Semiconductor wafer tilt monitoring on semiconductor...

Details Semiconductor wafer tilt monitoring on semiconductor... Semiconductor wafer tilt monitoring on semiconductor...

2002-01-12

2004-08-17

Stafira, Michael P. (Department: 2877)

Optics: measuring and testing

Angle measuring or angular axial alignment

C356S139100

Reexamination Certificate

active

06778266

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to semiconductor fabrication equipment, and more particularly to monitoring semiconductor wafer tilt on the plates of such equipment.
BACKGROUND OF THE INVENTION
The photolithographic process is one of the most important in semiconductor device fabrication. It transfers the designed pattern from a mask or reticle to photoresist that temporarily coats the wafer surface. Integrated track-stepper systems, which perform primer and photoresist coating, baking, alignment, exposure, and photoresist development process steps are housed in a photo bay. A stepper is the most commonly used tool to pattern the photoresist coated on the wafer surface, by exposing the photoresist with ultraviolet (UV) light or deep UV light to induce photochemical reactions. It is usually the most expensive tool in advance semiconductor fabrication foundries as well.
FIG. 1
shows an integrated track and stepper system
100
, which is also known as a photocell in a foundry. The system
100
includes a loader and unloader
102
, a track
102
, and a stepper
106
. A wafer
108
is loaded onto the loader and unloader
102
, and then proceeds to a preparation chamber
110
. It is cooled at the cool plate
112
, and then photoresist is spun onto the wafer
108
at the spin coater
114
. The wafer
108
is heated on the hot plate
116
to cure the photoresist, and then cooled again on the cool plate
118
. The wafer
108
is moved to the stepper
106
, where the desired photo image is exposed onto the photoresist on the wafer
108
. The wafer
108
is again heated and cooled at the hot plate
120
and the cool plate
122
, respectively. After development in the developer
124
, the wafer
108
is heated and cooled at the hot plate
126
and the cool plate
128
, respectively, and returns to the loader and unloader
102
for unloading.
In an advanced semiconductor fabrication foundry, the track and stepper system likely does not look like that of FIG.
1
. Instead, a stacked track system is used, which has a much smaller footprint. This is achieved by stacking the hot plates and the cool plates instead of putting them on the same plane. Some systems also stack the spin coaters and development stations, to further reduce the footprint and reduce clean room space usage. An example of a stacked track system is the Clean Track Act 8 system that is available from Tokyo Electron, Ltd., of Tokyo, Japan, which is used with 200 mm semiconductor wafers.
FIG. 2
shows an example plate system
200
of one of the hot plates or the cool plates of
FIG. 1
, and that can also be found in more advanced track and stepper systems that stack the plates. A hot plate is also referred to as a heating plate, whereas a cool plate is also referred to as a cooling plate or a chilling plate. The plate system
200
includes the plate
202
itself, as well as wafer guides
204
and
206
between which the semiconductor wafer
108
is placed. The guides
204
and
206
serve to assist the track system in proper placement of the wafer
208
onto the plate
202
, so that uniform heating or cooling is performed on the wafer
208
.
Unfortunately, even with the presence of the guides
204
and
206
, the semiconductor wafer
208
can become misaligned on the plate
202
, such that it is tilted. This is shown in FIG.
3
. In the system
200
′, which is the system
200
in which the wafer
208
has tilted, the wafer
208
′ is tiled. The wafer
208
′ is the wafer
208
as tilted. The tilting of the wafer
208
′ prevents uniform heating or cooling, since the wafer
208
′ is not properly placed on the plate
202
. Tilting may be caused by the track arm not being able to reach the correct position on the plate
202
for positioning the wafer
208
′, among other causes. Semiconductor wafer tilt is problematic. It can cause abnormal photoresist thickness, due to non-uniform heating or cooling. The ability to control the size of features such as lines is also impaired due to the non-uniform heating or cooling. Ultimately, significant semiconductor wafer scrap may result, which can be costly to the semiconductor manufacturer.
Therefore, there is a need for monitoring semiconductor wafer tilt on plates of semiconductor fabrication equipment. More specifically, there is a need for monitoring such tilt on the hot and cool plates of track systems. Such monitoring should be able to allow for prevention of non-uniform heating or cooling, so that the problems associated with such non-uniformities are avoided. For these and other reasons, there is a need for the present invention.
SUMMARY OF THE INVENTION
The invention relates to monitoring semiconductor wafer tilt. A system for such monitoring includes one or more light sources and one or more light detectors. Each light source generates light that is reflected by the semiconductor wafer. Each light detector senses a detected light value of the light reflected by the semiconductor wafer. If the detected light value deviates from a normal value corresponding to no wafer tilt, then this indicates that the semiconductor wafer has tilted.
Embodiments of the invention provide for advantages over the prior art. Monitoring of semiconductor wafer tilt per the invention allows for prevention of non-uniform heating and cooling. As a result the problems associated with semiconductor wafer tilt are prevented, such as abnormal photoresist thickness, and the inability to control the size of features such as lines. Semiconductor wafer scrap is also reduced. Still other advantages, aspects, and embodiments of the invention will become apparent by reading the detailed description that follows, and by referring to the accompanying drawings.


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