Semiconductor wafer testing system and method

Details Semiconductor wafer testing system and method Semiconductor wafer testing system and method

2002-03-15

2003-12-02

Cuneo, Kamand (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S750010

Reexamination Certificate

active

06657453

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to an apparatus and method for testing a plurality of semiconductor devices of a common wafer and, more particularly, to an apparatus and method that permits large scale parallel testing of the semiconductor devices despite the potential for large clusters of defects in the wafer.
It is desirable to conduct quality assurance tests on semiconductor devices of a common wafer prior to their removal from the wafer. Indeed, knowledge that a particular semiconductor device of the wafer is defective avoids the costs associated with careful removal and packaging of the defective semiconductor device.
FIG. 1
illustrates a known technique for testing a semiconductor device
12
while it remains integral with the wafer
10
. The wafer
10
includes a plurality of semiconductor devices
12
, it being understood that an actual wafer may include any number of semiconductor devices
12
, a typical number being about 500. An apparatus
20
for testing the semiconductor device
12
may include a test signal generator
22
, a driver
24
, and a signal sense circuit
26
. The test signal generator
22
produces a test signal that may be modified by the driver
24
. For example, the driver
24
may amplify the test signal to produce an amplified test signal having one or both of a larger voltage amplitude or current capability as compared to the test signal. Often, the driver
24
simply provides a source of current that is greater than the test signal generator
22
could provide alone.
The amplified test signal produced by the driver
24
is delivered to the semiconductor device
12
by way of a wafer level contactor
30
A that may automatically engage with and disengage from portions of the semiconductor device
12
. More particularly, the semiconductor device
12
may include an electronic circuit portion
14
A and a plurality of terminals (or pads)
16
A,
16
B, etc. The terminals
16
provide input/output connections to various nodes of the electronic circuit portion
14
A. (Later in the manufacturing process, the terminals
16
are utilized to connect the electronic circuit portion
14
to external leads of the semiconductor package.) The wafer level contactor
30
A engages with terminal
16
A such that the amplified test signal from the driver
24
may be delivered to the electronic circuit portion
14
and quality assurance tests may be performed.
A given quality assurance test may require that more than one wafer level contactor
30
engage the semiconductor device
12
. Two wafer level contactors (or probes)
30
A and
30
B are shown for purposes of discussion. The signal sense circuit
26
functions to monitor the voltage and/or current of the one or more signals provided to the semiconductor device
12
during the quality assurance test to determine whether the semiconductor device
12
is defective.
By way of example, the quality assurance test may be a short circuit test to determine whether a given terminal, such as terminal
16
A of the semiconductor device
12
is shorted to another of the terminals, such as terminal
16
B of the semiconductor device
12
. This test may be utilized to determine whether a particular input terminal
16
is shorted to VSS or VDD of the electronic circuit portion
14
. When the test signal generator
22
causes the voltage potential of the amplified test signal to substantially rise above the voltage potential at terminal
16
B, significant current flow from the driver
24
through the wafer level contactor
30
A would indicate a short circuit between terminal
16
A and terminal
16
B. The signal sense circuit
26
may measure the current by way of a current transformer or a voltage drop across a series coupled resistor R.
It is desirable to perform the quality assurance tests on substantially all of the semiconductor devices
12
of the wafer
10
concurrently (i.e., in parallel) in order to increase the efficiency of the quality assurance testing procedure. With reference to
FIG. 2
, all of the semiconductor devices
12
(only four semiconductor devices
12
A-D being shown for simplicity) may be tested in parallel utilizing apparatus
50
. The apparatus
50
includes the test signal generator
22
, the driver
24
, and the signal sense circuit
26
of
FIG. 1
, but also includes a plurality of isolation resistors
52
associated with the driver
24
. The isolation resistors
52
produce respective signals on a plurality of wafer level contactors
30
A-D, which engage respective terminals
16
(not shown) of the semiconductor devices
12
A-D.
The isolation resistors
52
mitigate against a defect in one of the semiconductor devices
12
from upsetting the quality assurance test of another of the semiconductor devices
12
. For example, when short circuit testing is performed, a short circuit existing in semiconductor
12
A may tend to draw significant current from the driver
24
. The current would flow through one of the isolation resistors (e.g., resistor
54
), through the short circuit of the semiconductor device
12
A, and into ground (assuming that the driver
12
produced an amplified test signal having a voltage potential higher than ground). The short circuit current would cause a voltage drop across the isolation resistor
54
. This voltage drop may be measured by the signal sense circuit
26
in order to detect that the semiconductor device
12
A is defective (i.e., includes a short circuit).
Ideally, the short circuit on semiconductor device
12
A (and resultant increased current from the driver
24
through isolation resistor
54
) would not deleteriously affect the quality assurance tests concurrently being performed on semiconductor devices
12
B-D. In other words, the quality of the test signal being delivered to semiconductor devices
12
B-D via wafer level contactors
30
B-
30
D would ideally not be affected by the defect on semiconductor device
12
A. In a practical circuit, however, the increased current drawn from the driver
24
through isolation resistor
54
due to the short circuit on semiconductor device
12
A will affect the quality of the test signals being delivered to the other semiconductor devices
12
B-D, although the affect is often negligible when only a few of the plurality of semiconductor devices
12
includes a defect. The conventional apparatus
50
, however, may employ one driver
24
to service over one hundred semiconductor devices
12
by employing a corresponding number of isolation resistors
52
. A larger number of defective semiconductor devices
12
could draw excessive current from the driver
24
, thereby causing excessive degredation of the test signals being delivered to the other semiconductor devices
12
.
With reference to
FIG. 3
, a first driver
24
A may service all of the semiconductor devices
12
in a first zone
60
of the wafer
10
. A first set of isolation resistors
52
A may be utilized to isolate the test signals delivered to the respective semiconductor devices
12
of the first zone
60
. Similarly, a second driver
24
B may service all of the semiconductor devices
12
in a second zone
62
by way of a second set of isolation resistors
52
B. Third and fourth drivers may service the semiconductor devices of other zones, although they are not shown for purposes of simplicity.
When only a relatively small number of defective devices
12
exist in the first zone
60
of the wafer
10
, the driver
24
A may have a sufficiently high current rating to source the current required to flow through the associated isolation resistors
52
A and defective semiconductor devices
12
to maintain the quality of the test signals provided to the other semiconductor devices (non-defective semiconductor devices) in the first zone
60
. When a significant number of semiconductor devices
12
are defective, however, such as would be the case in a large cluster of defects
70
, the driver
24
A might not be capable of delivering sufficient current through the associated isolation resistors
52
A to maintain the integrity of the other test si

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