Semiconductor wafer testing system

Details Semiconductor wafer testing system Semiconductor wafer testing system

2005-05-03

2005-05-03

Pert, Evan (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S1540PB, C324S765010

Reexamination Certificate

active

06888365

ABSTRACT:
A semiconductor wafer testing system tests one or more die clusters on a semiconductor wafer, using a test circuit to test multiple sections or areas of each die in parallel. The semiconductor wafer testing system has a buffer connected to the die cluster via the test circuit. The buffer writes test data onto a section of each die in the die cluster. The buffer reads test data from the section of each die in the die cluster.

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patent: 6046600 (2000-04-01), Whetsel
patent: 6166557 (2000-12-01), Whetsel
patent: 6233184 (2001-05-01), Barth et al.
Keeth, Brent et al., “DRAM Circuit Design A Tutorial,” IEE Press Series on Microelectronic Systems, 24 pages.

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