Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – Groove
Reexamination Certificate
2011-08-09
2011-08-09
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
Groove
C257S618000, C257S623000, C257S797000
Reexamination Certificate
active
07994614
ABSTRACT:
Provided is a semiconductor wafer with a scribe line region and a plurality of element forming regions partitioned by the scribe line region, the semiconductor wafer including: conductive patterns formed in the scribe line region; and an island-shaped passivation film formed above at least a conductive pattern, which is or may be exposed to a side surface of a semiconductor chip obtained by dicing the semiconductor wafer along the scribe line region, among the conductive patterns, so that the island-shaped passivation film is opposed to the conductive pattern.
REFERENCES:
patent: 2006/0103025 (2006-05-01), Furusawa et al.
patent: 2008/0174023 (2008-07-01), Park
patent: 2006-108489 (2006-04-01), None
patent: 2006-140404 (2006-06-01), None
patent: 2006-203215 (2006-08-01), None
Isozaki Seiya
Tanaka Kouji
McGinn Intellectual Property Law Group PLLC
Pham Long
Renesas Electronics Corporation
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