Semiconductor wafer processing apparatus and method of...

Coating apparatus – Gas or vapor deposition – Multizone chamber

Reexamination Certificate

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Details

C118S500000, C156S345420, C438S689000

Reexamination Certificate

active

06391113

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus and a method for controlling a semiconductor wafer processing in a semiconductor manufacturing line. More particularly, the present invention relates to a processing apparatus and a control method thereof which performs treatments such as a chemical processing, a cleaning processing and a drying processing on a multibath and batch/dip type bath line for processing semiconductor wafers.
2. Background Art
A single line of multibath and batch/dip type bath for processing semiconductor wafers is employed to perform a continuous processing of semiconductor wafers with many kinds of chemicals, allowing a processing in a plurality of batches to be performed simultaneously. In a mass-production factory, batches are introduced by a tact, and usually several batches are simultaneously processed by a single line of multibath and batch/dip type bath apparatus.
Also, in the case of such a multibath and batch/dip type bath apparatus, a wafer counter is provided at a lot introducing portion (a loader portion) and a lot retrieving portion (an unloader portion) in order to detect missing or breakage of the wafers. This makes it possible to judge that missing or breakage of the wafers, when the counted number differs between an introducing time and a retrieving time.
In a conventional processing apparatus, when several batches are being processed, and if breakage or missing of the wafers happens in any of the batches lead to a trouble, the breakage or missing of the wafers may not been detected until the troubled lot is retrieved at the lot retrieving portion. The following batches, by that time, enters a bath in which the trouble had occurred, and will be secondary-contaminated by causes such as the fragments produced. In addition to this, in the case of a trouble in a transportation system, an identical trouble is expected to spread over the following lots, thus extending the damages even further.
SUMMARY OF THE INVENTION
The present invention has been made in order to solve the above-mentioned problems in the conventional art, and thus an object of the present invention is to rapidly or instantaneously detect troubles arising from missing or breakage of the wafers in a multibath and batch/dip type semiconductor wafer processing apparatus. Also, another object of the invention is to provide a processing apparatus which makes it possible to prevent the secondary damages from extending over the following lots by setting an interlock for the following lots in correspondence to the detection result.
According to one aspect of the present invention, a semiconductor wafer processing apparatus includes a plurality of processing baths for processing semiconductor wafers in sequence on a batch-processing basis, a loader portion for introducing the semiconductor wafers into a first processing bath, and an unloader portion for retrieving the semiconductor wafers from a final processing bath. Further, the processing apparatus comprises an introduced wafer counter for counting the number of the semiconductor wafers introduced from the loader portion. Also provided are a plurality of passing wafer counters for counting the number of the semiconductor wafers passing through a predetermined number of the processing baths selected from the plurality of processing baths. Further, provided is a retrieved wafer counter for counting the number of the semiconductor wafers retrieving from the unloader portion.
In the semiconductor wafer processing apparatus, the introduced wafer counter is provided at the loader portion, and the passing wafer counters are preferably provided between the plurality of passing baths, and the retrieved wafer counter is provided at the unloader portion.
Alternatively, in the semiconductor wafer processing apparatus,
the passing wafer counters are provided preferably inside the selected processing baths.
In another aspect of the present invention, the semiconductor wafer processing apparatus further comprises an alarming means which issues an alarm when the number of the wafers detected by the passing wafer counters or by the retrieved wafer counter differs from that of the number of the wafers detected by the introduced wafer counter.
The semiconductor wafer processing apparatus further comprises preferably an interlock means which, when any of the passing wafer counters issues an alarm, stops processing in the corresponding processing bath, and prevents additional lots from being introduced into the loader portion, and stops processing in upstream processing baths after completion of the chemical processing under way, and allows processing in downstream processing baths to continue.
Further, the interlock means preferably has an automatic reset function which, when a trouble in the processing bath which has issued the alarm is released, automatically continues processing of the following lots on standby.
According to another aspect of the present invention, in a method of controlling the semiconductor wafer processing apparatus, an alarm is issued when the number of the wafer detected by the passing wafer counters or by the retrieved wafer counter differs from the number of the wafers detected by the introduced wafer counter, and the processing is stopped in the corresponding processing bath. Additional lots are prevented from being introduced into the loader portion. Processing in upstream processing baths is stopped after the completion of the chemical processing under way, and processing in downstream processing baths is allowed to continue.
Further, in the method, processing of the following lots on standby is automatically continued when a trouble in the processing bath corresponding to the alarm is released.
Other and further objects, features and advantages of the invention will appear more fully from the following description.


REFERENCES:
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patent: 5370142 (1994-12-01), Nishi et al.
patent: 5406092 (1995-04-01), Mokuo
patent: 5524131 (1996-06-01), Uzawa et al.
patent: 5824119 (1998-10-01), Takeuchi
patent: 1-144647 (1989-06-01), None
patent: 3-237739 (1991-10-01), None
patent: 5-152423 (1993-06-01), None
patent: 6-132269 (1994-05-01), None
patent: 6-151401 (1994-05-01), None

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