Semiconductor wafer probing method including arranging index reg

Details Semiconductor wafer probing method including arranging index reg Semiconductor wafer probing method including arranging index reg

1994-12-22

1996-12-17

Karlsen, Ernest F.

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

G01R 3102

Patent

active

055857370

ABSTRACT:
A semiconductor wafer probing method for reducing the number of times of an "indexing" or wafer transfer operation and improving verification efficiency. In the semiconductor wafer probing method, a probe card has a first plurality of upright probe needles (e.g. sixteen) corresponding to chips (e.g. eight) arranged in a vertical or "row" direction and chips (e.g. 2) arranged in a horizontal or "column" direction. A first plurality of chips that can be verified by such a probe card is defined as an index region. A (second) plurality of index regions are arranged so as to minimize the number of occurrences where the probe needles will not have a chip to contact as the wafer and needles are moved relative to each other. Such (second) plurality of index regions is defined as a contact region 23.

REFERENCES:
patent: 4799009 (1989-01-01), Tada et al.
patent: 4985676 (1991-01-01), Karasawa
patent: 5336992 (1994-08-01), Saito et al.

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