Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate
2000-11-09
2003-03-04
Chaudhuri, Olik (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
C257S622000
Reexamination Certificate
active
06528864
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor wafer to be diced into semiconductor chips of same or different shapes for making the best use of semiconductor materials and sizes and a method of dicing such a semiconductor wafer.
2. Related Arts
Referring to
FIG. 12
, a semiconductor wafer W has a lattice pattern formed therein, delimiting a plurality of chip areas P of same size by crossing streets S. The semiconductor wafer W can be cut and divided into separate chips P by a dicing machine.
Use of such a dicing machine requires crosswise arrangement of straight streets S, thus preventing the cutting of a semiconductor wafer into chips of different shapes and/or sizes, such as circle, trapezoid, “L”-shape, concave or convex shape. Also disadvantageously, use of the dicing machine makes it difficult to avoid the waste of semiconductor material, allowing a significant amount of remaining material to be left and thrown away.
SUMMARY OF THE INVENTION
One object of the present invention is to provide a dicing method for dividing semiconductor wafer into chips of regular or irregular shapes and sizes.
Another object of the present invention is to provide a semiconductor wafer having a regular or irregular chip pattern formed thereon.
According to one aspect of the present invention, a semiconductor wafer whose pattern is composed of a plurality of chip areas delimited by a plurality of streets which at least one or more streets are not straight.
The pattern of the semiconductor wafer may be composed of rectangular chip areas of same size delimited by a plurality of streets which are wholly or partly staggered to be in conformity with arrangement of the rectangular chip areas.
The staggered-lattice formation of chip areas permits the whole area of semiconductor wafer to be used to possible extent, avoiding the waste of semiconductor material. Specifically the number of rectangular chips of same size can be increased 5 to 10 or more percent relative to the regular lattice formation of chip areas.
Further, the pattern of the semiconductor wafer may be composed of a plurality of chip areas of different shapes and/or sizes delimited by a plurality of streets which are so bent or curved that they may separate adjacent chip areas.
According to another aspect of the present invention, a method of dividing a semiconductor wafer into chips of rectangular or different shapes and/or sizes comprises: first step of coating one of the opposite surfaces of the semiconductor wafer with a photo-resistive material; second step of selectively exposing the photo-resistive coating to the light, thereby removing the coating area lying over the streets delimiting chip areas; third step of subjecting the semiconductor wafer having its streets exposed to chemical etching to make grooves in conformity with the street pattern; and fourth step of separating the semiconductor wafer into chips.
Grooves may be made a predetermined distance deep at the third step; and the semiconductor wafer may be grounded on the other surface to remove the remaining thickness of the grooved semiconductor wafer, thus separating it into chips.
The grinding of the semiconductor wafer on its other surface permits the semiconductor wafer to be easily separated into chips no matter what shapes and/or sizes they may have.
Grooves may be made deep enough to reach the one surface of the semiconductor wafer, thereby separating the semiconductor wafer into chips.
The chemical etching may be wet-etching or dry-etching. The dry-etching permits each groove to be several tens microns deep while the groove remains several microns wide.
REFERENCES:
patent: 4932064 (1990-06-01), Kasahara
patent: 6075280 (2000-06-01), Yung et al.
patent: 6326697 (2001-12-01), Farnworth
Chaudhuri Olik
Disco Corporation
Pham Thanh V
Rader & Fishman & Grauer, PLLC
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