Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate
2005-01-25
2005-01-25
Thomas, Tom (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
C257S048000, C257S773000, C257S774000, C438S401000, C438S462000
Reexamination Certificate
active
06847096
ABSTRACT:
To prevent an abnormal discharge phenomenon from occurring due to charge build up on conductive layer region that has a large surface area and that is a region other than the region where a semiconductor device is formed on a semiconductor substrate, the semiconductor substrate structure being made to have an electrical connection between the conductive layer region having a large surface area and the semiconductor substrate.
REFERENCES:
patent: 6236073 (2001-05-01), Hsu
patent: 6627917 (2003-09-01), Fenner et al.
patent: 20010010964 (2001-08-01), Geissler et al.
patent: 20020158348 (2002-10-01), Petrucci et al.
patent: 20030030129 (2003-02-01), Terada et al.
Hirano Takehiro
Kumagai Hiroaki
Yanai Tetsuro
Oki Electric Industry Co. Ltd.
Thomas Tom
Volentine Francos & Whitt PLLC
Warren Matthew E.
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