Semiconductor wafer, handling apparatus, and method

Stock material or miscellaneous articles – Structurally defined web or sheet – Including aperture

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428 666, 428134, 428446, 414935, 414936, 414937, 414938, 414939, 414940, 414941, 118502, 118503, 118500, 269 47, 269 48, 269 481, 269 482, 269 483, 269 484, 262 49, 262 50, 262 51, 262 52, B65G 4907, B32B 324

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060869763

ABSTRACT:
A semiconductor wafer comprising a single crystalline lattice suitable for use in the manufacture of integrated circuits, namely computer chips and dies, wherein a diameter of the wafer is greater than approximately 150 millimeters and wherein the wafer includes a first hole extending through the wafer. The hole is adapted to facilitate handling of the wafer without directly contacting a surface of the wafer. The wafer preferably includes a primary flat and the first hole includes a flat side having a predetermined and known orientation with respect to the primary flat of the wafer. In one embodiment, the wafer further includes a guide hole formed near the first hole such that the center-points of the first hole and the guide hole are oriented with a predetermined and known orientation with respect to the primary flat of the wafer.

REFERENCES:
patent: 4624876 (1986-11-01), Nevin
patent: 4966549 (1990-10-01), Ohdate
patent: 5277769 (1994-01-01), Medernach
patent: 5372612 (1994-12-01), Cronin et al.
patent: 5451130 (1995-09-01), Kempf
patent: 5543022 (1996-08-01), Nguyen et al.
patent: 5711647 (1998-01-01), Slocum

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