Semiconductor wafer examination system

Details Semiconductor wafer examination system Semiconductor wafer examination system

2006-04-25

2006-04-25

Bali, Vikkram (Department: 2623)

Image analysis

Applications

Manufacturing or product inspection

C382S308000, C382S224000

Reexamination Certificate

active

07035447

ABSTRACT:
A semiconductor wafer examination system can accurately and reliably detects defects of semiconductor wafers. The semiconductor wafer examination system1comprises a defect classification device for automatically classifying defects of semiconductor wafers on the basis of defect detection parameters and a knowledge base and a classification support device for supporting the operation of the defect classification device. The defect detection parameters define the permissible deviation of the surface image of a defective semiconductor wafer from that of a normal semiconductor wafer. The knowledge base contains data for the types of defects that can occur in semiconductor wafers and data for showing the characteristics of each type. The classification support device prepares data on isolated defective areas that are used for selecting and/or altering the defect detection parameters and preparing the knowledge base.

REFERENCES:
patent: 6185324 (2001-02-01), Ishihara et al.
patent: 6233719 (2001-05-01), Hardikar et al.
patent: 6292582 (2001-09-01), Lin et al.
patent: 6438438 (2002-08-01), Takagi et al.

Affiliated with

Also associated with

Rating

Semiconductor wafer examination system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor wafer examination system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor wafer examination system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3615032