Supports: racks – Special article – Platelike
Reexamination Certificate
2007-02-01
2010-02-16
Novosad, Jennifer E. (Department: 3637)
Supports: racks
Special article
Platelike
Reexamination Certificate
active
07661544
ABSTRACT:
A boat is provided for stacking semiconductor wafers vertically in processes in which low friction deposits may coat wafer supporting surfaces. In carbon processes, for example, low friction coatings can form that allow the wafers to slip sideways in the boat, leaving them sufficiently out of alignment to cause wafer breakage in handling. Typical boats for these processes having vertical legs, typically three or four in number, in which aligned notches support each of the wafers. The slots provide enough clearance around the edge of the wafer to facilitate loading and unloading of the wafers without wafer damage, as long as the wafers remain centered. For low friction process environments, each notch is provided with a shallow recess on which the edge of a wafer can rest. The recess adds a low step close to the wafer edge that resists horizontal sliding movement of the wafer. Wafers are loaded by inserting them into the boat in a plane spaced above the steps, then lowered onto the recesses.
REFERENCES:
patent: 4707247 (1987-11-01), Savoy
patent: 4727993 (1988-03-01), Mirkovich et al.
patent: 4802842 (1989-02-01), Hirayama
patent: 4950870 (1990-08-01), Mitsuhashi et al.
patent: 5162047 (1992-11-01), Wada et al.
patent: 5310339 (1994-05-01), Ushikawa
patent: 5431561 (1995-07-01), Yamabe et al.
patent: 5458688 (1995-10-01), Watanabe
patent: 5534074 (1996-07-01), Koons
patent: 5562387 (1996-10-01), Ishii et al.
patent: 5577621 (1996-11-01), Yi
patent: 5586880 (1996-12-01), Ohsawa
patent: 5626456 (1997-05-01), Nishi
patent: 5775889 (1998-07-01), Kobayashi et al.
patent: 5813851 (1998-09-01), Nakao
patent: 5820367 (1998-10-01), Osawa
patent: 5865321 (1999-02-01), Tomanovich
patent: 5897311 (1999-04-01), Nishi
patent: 6059123 (2000-05-01), Cotutsca
patent: 6095806 (2000-08-01), Suzuki et al.
patent: 6099302 (2000-08-01), Hong et al.
patent: 6186344 (2001-02-01), Park et al.
patent: 6344387 (2002-02-01), Hasebe et al.
patent: 6523701 (2003-02-01), Yoshida et al.
patent: 6634882 (2003-10-01), Goodman
patent: 2002/0113027 (2002-08-01), Minami et al.
patent: 2003/0157453 (2003-08-01), Irie et al.
patent: 2005/0023231 (2005-02-01), Huang et al.
patent: 2005/0205502 (2005-09-01), Brown et al.
patent: 2006/0226094 (2006-10-01), Cho et al.
patent: 2007/0006803 (2007-01-01), Cadwell et al.
patent: 2007/0068882 (2007-03-01), Yoshizawa
patent: 2007/0125726 (2007-06-01), Seo
patent: 2007/0297876 (2007-12-01), Sasajima et al.
patent: 04006826 (1992-01-01), None
patent: 05291166 (1993-11-01), None
patent: 6168903 (1994-06-01), None
patent: 6260438 (1994-09-01), None
patent: 9199437 (1997-07-01), None
patent: 9199438 (1997-07-01), None
patent: 1050626 (1998-02-01), None
patent: 11003866 (1999-01-01), None
patent: 2000100739 (2000-04-01), None
EPO, International Search Report and Written Opinion of the International Searching Authority, International Application No. PCT/US2008/052760, Mailed Jun. 3, 2008, 12 pages.
Novosad Jennifer E.
Tokyo Electron Limited
Wood Herron & Evans L.L.P.
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