Semiconductor wafer and manufacturing process for...

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

Reexamination Certificate

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C257S618000, C257S620000, C257S622000, C257SE23179

Reexamination Certificate

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07554211

ABSTRACT:
A semiconductor wafer1has first scribe lines31in two mutually perpendicular directions which have a first width and divide the semiconductor wafer1into a plurality of areas; second scribe lines32which have a second width smaller than the first width and divide the area into a plurality of semiconductor chip areas2; an electrode pad5formed along the edge of the semiconductor chip area2; and a metal-containing accessory pattern4disposed in the scribe lines. In the second scribe lines32, the accessory pattern4is absent in at least the outermost surface in an area adjacent to the edge having the electrode pad5in the chip area2.

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