Semiconductor wafer and dicing method

Details Semiconductor wafer and dicing method Semiconductor wafer and dicing method

2004-12-21

2008-12-02

Andujar, Leonardo (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

With peripheral feature due to separation of smaller...

C257SE23179, C257SE21523, C438S113000, C438S458000, C438S462000

Reexamination Certificate

active

07459768

ABSTRACT:
In order to improve the yield by suppressing peeling or the like of an accessory pattern when dicing, there include: a substrate on which an element forming region and a scribe line region formed around the element forming region are provided; an accessory pattern formed on the scribe line region; a protective film covering the element forming region on the substrate; and supporting films located in the opening formed in the scribe line region and supporting the accessory pattern locally. Each of the supporting film is formed as a continuation of the protective film, and has a function of supporting an edge of the accessory pattern while avoiding a part along which the accessory pattern is diced with a dicing blade.

REFERENCES:
patent: 2001/0015476 (2001-08-01), Tada
patent: 2002/0192928 (2002-12-01), Kosugi
patent: 2003/0153172 (2003-08-01), Yajima et al.
patent: 03-129855 (1991-06-01), None
patent: 06-045437 (1994-02-01), None
patent: 2777426 (1998-05-01), None
patent: 2001-210609 (2001-08-01), None

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