Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature
Reexamination Certificate
1997-08-04
2002-04-23
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having substrate registration feature
C438S462000
Reexamination Certificate
active
06376329
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to an alignment method and apparatus for aligning an article and more particularly to alignment usable for instance in the fabrication of semiconductor devices such as integrated circuits for aligning a mask having a pattern thereon with a wafer.
2. Description of the Prior Art
Projection exposure apparatuses used in the manufacture of semiconductor devices, for projecting images of a pattern of a reticle upon different portions of the surface of a wafer in sequence by use of a projection lens systems, generally include an alignment system wherein, for aligning the reticle and the wafer prior to the projection exposure, a light is projected from the projection lens system side onto an alignment mark formed on the wafer surface. Such alignment light is diffracted by the features of the wafer alignment mark and the diffracted light is detected by a photoelectric detector, whereby an alignment signal representing the position of the wafer is obtained.
Typical prior art alignment involves topside alignment using a number of sets of marks, e.g. depressions, formed in the top (principal) surface of a wafer. However, problematically later processing steps blur or obliterate these marks and/or cover them up with other semiconductor layers, e.g. polysilicon structures, metallization, oxides, etc. This blurring or covering up typically requires forming new secondary alignment marks in the upper semiconductor layers; however these secondary marks are then typically slightly shifted from the location of the original marks, leading to alignment degradation. Thus the processing operation to form the integrated circuit introduces asymmetries in the mark locations, leading to further systematic shifts of the apparent mark positions as well as reducing the image quality of the marks.
U.S. Pat. No. 4,952,060, issued Aug. 28, 1992 to Ina et al., incorporated herein by reference in its entirety, discloses a backside alignment scheme in which the alignment marks are formed either on the principal surface of the wafer or on the backside of the wafer. In either case, the alignment marks are detected from the backside (lower side) of the wafer. Since this backside typically does not have semiconductor processing performed on it, and the silicon wafer is transparent to certain wavelengths of illumination, the original so-called “virgin” marks formed on the front side of the wafer are always visible from the wafer backside, in spite of subsequent processing steps. Thus the alignment signals are obtainable without being affected by the processing of the principal (frontside) surface of the wafer, and the undesirable deterioration of alignment accuracy is avoided.
Present
FIG. 1
(identical to FIG. 1 of Ina et al.) depicts such an apparatus for a step and repeat type reduction projection exposure system. Semiconductor wafer
1
(the workpiece) is held on a wafer chuck
9
mounted on a wafer stage
10
. Stage
10
is an XY stage movable in the X and Y directions and driven by a wafer stage driving system
11
. Reticle (mask)
4
(the original) has formed on its lower surface a pattern
20
to be transferred to each of the different areas (die) of the wafer
1
. Also, alignment marks
21
and
21
′ to be used for the alignment of the reticle
4
are located on reticle
4
. Light sources
3
and
3
′ provide light for the reticle alignment. A reticle stage
5
holds reticle
4
and is driven by a reticle stage driving system
6
to set the position of the reticle
4
in the X, Y and &thgr; (rotational) directions. Illumination system
7
illuminates reticle
4
since the pattern
20
on the reticle
4
is photoprinted on a resist layer provided on the wafer
1
upper surface. Projections lens system
8
images, on a reduced scale, the pattern
20
and the alignment marks
21
and
21
′ of the reticle
4
on the wafer
1
upper surface.
When a new reticle
4
is placed on the reticle stage
5
, the first step is to align the reticle
4
. Without a wafer in place, the illuminators
3
and
3
′ illuminate the reticle alignment marks
21
and
21
′. The projection lens
8
places a reduced image at the plane of the missing wafer. The wafer chuck
9
is provided with throughbores (not shown) formed at positions corresponding to the alignment marks
22
and
22
′ on the wafer or the images of the reticle alignment marks
21
and
21
′ projected by the projection lens system
8
. Alternatively the wafer chuck
9
is formed of a transparent glass material (quartz) instead of having the throughbores. The relay lens
14
(
14
′) reimages the reticle marks onto the reference plate members
13
and
13
′. Thus the alignment detecting system
16
can reference the reticle marks to the wafer reference. The reticle stage is moved to improve the reference. Now the wafer can be aligned to the references
13
and
13
′ and thus be aligned to the reticle marks
21
and
21
′. This is only one of several ways that the reticle marks can be referenced to the wafer.
Light sources
12
and
12
′ provide light to be used for the alignment of the wafer
1
. Reference plate members
13
and
13
′ each have formed thereon a reference mark
23
or
23
′ and have been previously aligned to the corresponding one of the reticle alignment marks
21
and
21
′ for the reticle alignment and for a corresponding one of the wafer alignment marks
22
and
22
′ for the wafer alignment. Relay lenses
14
and
14
′ each are movable in the direction of its optical axis. Reference mark
23
(
23
′) is provided for the position which is in the illustrated state, optically conjugate with the surface of the wafer chuck
9
with respect to the relay lens
14
(
14
′).
Alignment optical system
15
includes the above described relay lenses
14
and
14
′, reference plate members
13
and
13
′ etc. The alignment optical system
15
is arranged to project the alignment light emitted from the light sources
12
and
12
′ upon reference marks
23
and
23
′ respectively, and upon the wafer alignment marks
22
and
22
′, respectively which are formed on either the front or the rear (backside or lower) surface of the wafer
1
and which are related to the current area to be exposed on the wafer
1
. Thus by irradiation of these marks with light supplied from the light sources
12
and
12
′, optical signals necessary for the wafer alignment are obtained in the form of diffracted or reflected light from the features of these marks.
The alignment optical system
15
detects optical signals concerning the reticle alignment marks
21
and
21
′ as well as the reference marks
23
to
23
′ for reticle alignment purposes. Alignment detection system
16
is provided to measure or detect any relative position of deviation between each wafer alignment mark and a corresponding one of the reference marks, or each reticle alignment mark and a corresponding one of the reference marks.
Clearly, it is necessary when the alignment marks are on the top surface of wafer
1
that the light used to illuminate them passes through the wafer
1
. Since wafer
1
is typically of silicon, the disclosed light source is a carbon dioxide gas laser producing light of 10.31 microns wavelength.
While this system appears to have utility, it has not been put into commercial practice so far as is known. This may be because of a significant defect called herein wedging or tilting.
Semiconductor wafers are sawn from a cylinder bolus of silicon crystal. Since conventionally all wafer processing steps which require precision are performed on the principal (front) surface of each wafer, only that surface is typically provided to have a precision flat surface. That is, the backside surface may not be in a plane parallel to the frontside but may be slightly out of the plane, thus giving the wafer (in cross section) a slight wedge shape. It is to be und
McCoy John H.
Sogard Michael R.
Klivans Norman R.
Nikon Corporation
Skjerven Morrill & MacPherson LLP
Thompson Craig
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