Semiconductor wafer

Details Semiconductor wafer Semiconductor wafer

1992-07-08

1999-04-27

Martin-Wallace, Valencia

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

257665, 257698, 257773, H01L 2352

Patent

active

058971939

ABSTRACT:
A semiconductor wafer is arranged so that a burn-in test, which is performed to remove latent defects, can be conducted while the semiconductor chips are still on the semiconductor wafer. Sets of pad electrodes necessary for the burn-in test of the semiconductor chips are provided on each of the semiconductor wafers and are connected to external pad electrodes formed at a peripheral portion of the semiconductor wafer, by way of metal film wiring lines. High resistance polycrystalline silicone thin film wiring line portions which acts as fuses, and low resistance polycrystalline silicon wiring line portions which are cleanly cut upon dicing, are provided at a suitable intermediate location in the metal thin filming lines.

REFERENCES:
patent: 4381602 (1983-05-01), McIver
patent: 4679088 (1987-07-01), Chiyoma et al.
patent: 4722060 (1988-01-01), Quinn et al.
patent: 4847732 (1989-07-01), Stopper et al.
patent: 4942453 (1990-07-01), Ishida et al.
patent: 5036380 (1991-07-01), Chase
patent: 5117277 (1992-05-01), Yuyama et al.

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