Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate
2008-05-14
2010-12-21
Clark, Jasmine J (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
C257SE23179, C257SE21599, C257SE21523, C257SE21524
Reexamination Certificate
active
07855436
ABSTRACT:
A semiconductor wafer includes an insulation substrate with transparency; a silicon semiconductor layer formed on the insulation substrate; a chip forming area defined on the silicon semiconductor layer; a scribe line area defined on the silicon semiconductor layer for dividing the chip forming area; and an opaque pattern layer formed in the scribe line area. A plurality of opaque pattern portions is arranged apart from each other in the opaque pattern layer.
REFERENCES:
patent: 6465897 (2002-10-01), Shih et al.
patent: 57-172750 (1982-10-01), None
patent: 2005-223304 (2005-08-01), None
Clark Jasmine J
Kubotera & Associates LLC
OKI Semiconductor Co., Ltd
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