Semiconductor varactor diode with doped heterojunction

Active solid-state devices (e.g. – transistors – solid-state diode – Voltage variable capacitance device – With specified dopant profile

Reexamination Certificate

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C257S480000, C257S595000, C257S597000, C257S598000, C257S599000, C257S600000, C257S601000, C257S602000

Reexamination Certificate

active

06787882

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to semiconductor devices and, more particularly, to semiconductor varactor diodes.
BACKGROUND OF THE INVENTION
Varactor diodes are semiconductor devices which are generally used in a variety of applications including, harmonic generators, frequency multipliers, oscillators and phase shifters. An important characteristic of the varactor diode is that the diode presents a capacitance which varies as a result of applying a variable bias voltage to a depletion region of the diode. Generally speaking, varactor diodes are known as variable-capacitance devices. The capacitance is typically modeled as a parallel-plate capacitance with the depletion region serving as a dielectric. The depletion region varies with a corresponding change in voltage applied to the varactor diode, thereby changing the distance between the parallel plates and resulting in variable capacitance. Conventional varactor diodes include P-N junction diodes and Schottky diodes which include layers that are doped with impurities in order to achieve a desired variable capacitance. Although the use of graded doping provides some degree of freedom in achieving desirable capacitance characteristics, the range of variable capacitance is limited and in certain applications insufficient due to the design and structural limitations of the device.
Conventional varactor diodes further include a parasitic series resistance which is a direct consequence of current flowing through undepleted regions of the diode.
A voltage drop is generated as a result of current flowing through the parasitic resistance of the varactor diode, thus requiring an increase in external voltage to compensate for the voltage drop. In an effort to reduce the parasitic series resistance of the varactor diode and to provide some degree of control over the voltage dependent capacitance, custom doping profiles are often used to modify the characteristics of the varactor diode.
One prior art varactor diode is disclosed in U.S. Pat. No. 5,336,923 to Geddes et al. The Geddes et al. patent discloses a varactor diode having a stepped-capacitance, voltage profile. The varactor diode includes doped and undoped layers which are formed on a semiconductor substrate. The diode further includes a Schottky contact and an ohmic contact which are disposed on a selected undoped layer for enabling an external voltage to be applied to the device. The characteristics of the varactor diode are modified by selecting specific layer thicknesses and providing higher doping concentrations. Although higher doping concentrations effectively reduce the series resistance of the diode, providing higher doping concentrations also requires that a higher external voltage be applied in order to produce a variable capacitance.
Another prior art varactor diode is disclosed in U.S. Pat. No. 5,747,865 to Kim et al. The Kim et al. patent discloses a varactor diode having a surface layout area and a depletion layer area. The capacitance characteristic of the varactor diode is modified by varying the depletion layer area as a result of varying the surface layout area. A desired capacitance is achieved through a layout contour of the surface area by using specific mask patterns in a multi-etching process, selective epi-layer growing process or ion implantation process.
A further prior art variable capacitance diode is disclosed in U.S. Pat. No. 4,987,459 to Kasahara. The Kasahara patent discloses a variable capacitance diode comprising an epitaxial layer of a first conductivity type disposed on a semiconductor substrate, a diffusion layer of a first conductivity type formed in the epitaxial layer, and a diffusion layer of a second conductivity type formed in the diffusion layer of a first conductivity type. The diode also includes a buried layer. A PN junction is formed between the diffusion layers and the epitaxial layer and electrodes are provided at the top and bottom of the diode structure for receiving an external voltage. The range of variable capacitance of the diode is increased as a result of custom doping the epitaxial layer and diffusion layers with different impurity concentrations.
SUMMARY OF THE INVENTION
In accordance with the invention, an improved varactor diode is provided which affords, important advantages over prior art varactor diode devices. The varactor diode includes doped heterojunction layers which offer additional degrees of freedom in design, resulting in a greater ability to modify the characteristics of the varactor diode so as to provide a desired variable capacitance and a constant series resistance.
According to the present invention, there is provided a varactor diode comprising: a substrate of semiconducting material; a plurality of barrier layers and a plurality of quantum-well layers alternately interleaved with each other and disposed on said substrate so as to form a multiple quantum-well heterostructure; a depletion region formed in said multiple quantum-well heterostructure; an embedded region formed in said multiple quantum-well heterostructure so as to be electrically connected to each of said barrier layers and each of said quantum-well layers; and a substrate contact electrically connected to said embedded region and a region contact electrically connected to said depletion region for enabling an external voltage to be applied between said substrate contact and said region contact so as to cause a variation in said depletion region as a result of a variation in the external voltage.
Preferably, the substrate is heavily doped with an n-type impurity, the plurality of barrier layers include an alloy of a first composition and the plurality of quantum well layers include an alloy of a second composition.
Advantageously, the depletion region comprises a predetermined number of said plurality of barrier layers and a predetermined number of said plurality of quantum-well layers.
Advantageously, the depletion region further comprises a depletion edge extending parallel to said substrate and disposed adjacent to one of said plurality of quantum-well layers, said depletion edge moving parallel to said substrate and adjacent to a different one of said plurality of quantum-well layers as a result of a variation in said external voltage.
Preferably, each of the predetermined number of barrier layers is doped with an n-type impurity concentration of 1×10
16
cm
−3
, and each of the predetermined number of quantum-well layers is doped with an n-type impurity concentration of at least 1×10
18
cm
−3
.
Preferably, the average doping density for the barriers and wells together is set at a value such as to result in a Debye length (charge screening length) that is larger by a factor of at least 2 as compared with the sum of a single well and a single barrier thickness. An important advantage of this features is that it results in a smooth capacitance variation with bias, rather than a stepped variation, because the sharpness of the depletion front is less abrupt than the periodicity of the well and barrier structure.
Preferably, the embedded region is heavily doped with an n-type impurity.
Advantageously, the substrate contact comprises an annular metal ring and the region contact comprises a Schottky metal layer.
Preferably, the substrate contact comprises germanium-nickel-gold and the region contact comprises titanium-platinum-gold.
Advantageously, the substrate contact and the region contact are patterned into interdigitated fingers so as to minimize series resistance.
In accordance with a further aspect of the invention, there is provided a varactor diode comprising: a substrate of semiconducting material; a plurality of barrier layers and a plurality of undepleted quantum-well layers providing a primary conductive path, said barrier layers and said undepleted quantum-well layers being alternately interleaved with each other and being formed on said substrate; a depletion region including a depletion front disposed adjacent to, and extending parallel to, said primary conductive path; a dope

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