Semiconductor unit package, semiconductor unit packaging method,

Details Semiconductor unit package, semiconductor unit packaging method, Semiconductor unit package, semiconductor unit packaging method,

1996-01-29

1997-06-24

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Encapsulated

257780, 257783, H01L 2328

Patent

active

056419961

ABSTRACT:
An improved semiconductor unit package is disclosed. This package is implemented by a semiconductor device having an electrode pad, a substrate having a terminal electrode, a bump electrode formed on the electrode pad, a conductive adhesion layer with flexibility, and an encapsulating layer formed by curing a composition the viscosity and thixotropy index of which are below 100 Pa.multidot.s and below 1.1, respectively. Such a composition essentially consists of (A) a resin binder that contains, for example, a polyepoxide, an acid anhydride, and a rheology modifier and (B) a filler. The rheology modifier is one capable of impeding interaction between a free acid contained in the acid anhydride and a polar group at the surface of the filler. An encapsulant with improved flowability is used, so that the encapsulant readily flows and spreads to fill a gap between the semiconductor device and the substrate with no air bubbles. This achieves semiconductor unit packages with high reliability and productivity.

REFERENCES:
patent: 4604644 (1986-08-01), Beckham et al.
patent: 4999699 (1991-03-01), Christie et al.
patent: 5121190 (1992-06-01), Hsiao et al.
patent: 5128746 (1992-07-01), Pennisi et al.
patent: 5136365 (1992-08-01), Pennisi et al.
patent: 5194930 (1993-03-01), Papathomas et al.
patent: 5292688 (1994-03-01), Hsiao et al.
patent: 5371404 (1994-12-01), Juskey et al.
patent: 5436503 (1995-07-01), Kunitomo et al.
patent: 5442240 (1995-08-01), Mukerji
patent: 5450283 (1995-09-01), Lin et al.
patent: 5550408 (1996-08-01), Kunitomo et al.
Patent Abstracts of Japan, vol. 018, No. 590 (E-1628) (Nov. 10, 1994) and JP-A-6-224259 (Aug. 12, 1994).
Patent Abstracts of Japan, vo. 016, No. 397 (E-1252) (Aug. 24, 1992) and JP-A-4-130633 (May 1, 1992).
Database WPI, Sec. Ch. Week 8850, Derwent Publ. Ltd., London, GB and JP-A-63-268724 (Nov. 7, 1988).
Database WPI, Sec. Ch., Week 8910, Derwent Publ. Ltd., London, GB and JP-A-1-029416 (Jan. 31, 1989).
Database WPI, Sec. Ch., Week 9504, Derwent Publ. Ltd., London, GB and JP-A-6-313027 (Nov. 8, 1994).
Database WPI, Sec. Ch., Week 9444, Derwent Publ. Ltd., London, GB and JP-A-6-279654 (Oct. 4, 1994).

Affiliated with

Also associated with

Rating

Semiconductor unit package, semiconductor unit packaging method, does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor unit package, semiconductor unit packaging method,, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor unit package, semiconductor unit packaging method, will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-150660