Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2003-09-26
2009-12-15
Purvis, Sue (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S685000, C257SE23175
Reexamination Certificate
active
07633147
ABSTRACT:
A semiconductor unit constituting a memory device has a memory chip, a package substrate having three wiring layers. Power-supply surfaces (VDD surface) and (GND surface) are wired on the package substrate while an intra-package DQ bus is wired on an intermediate layer between both of the power-supply surfaces. The memory device has two DQ pins every one intra-package DQ bus. The intra-package DQ bus is connected to a signal terminal pad of the memory chip through a via hole. In view of the two DW pins, a via hole for connecting the intra-package DQ bus with the signal terminal pad constitutes a branch wire.
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Abo Hisashi
Funaba Seiji
Hosokawa Koji
Nakamura Atsushi
Nishio Yoji
Elpida Memory Inc.
Purvis Sue
Renesas Eastern Japan Semiconductor Inc.
Sandvik Benjamin P
Scully , Scott, Murphy & Presser, P.C.
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