Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame
Reexamination Certificate
2002-12-09
2003-08-05
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With structure for mounting semiconductor chip to lead frame
C257S666000, C257S723000
Reexamination Certificate
active
06603197
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a structure of semiconductor power module.
2. Description of the Background Art
FIGS. 9A and 9B
are diagrams showing a structure of conventional semiconductor module
90
.
FIG. 9A
shows a cross-sectional view of semiconductor module
90
.
FIG. 9B
is a top view of semiconductor module
90
.
Referring now to
FIGS. 9A and 9B
, the configuration of semiconductor module
90
is discussed. Semiconductor module
90
includes a main circuit formed by left-side lead frame
1
equipped with power element
2
and a control circuit formed by right-side lead frame
1
equipped with control element
3
. The main circuit is driven by the control circuit. Power element
2
is connected onto wiring formed by lead frame
1
by soldering. Control element
3
is also connected onto the wiring. Lead frame
1
, power element
2
, and control element
3
are electrically connected to one another by wire
4
. A semiconductor power module is formed by molding power element
2
and control element
3
of this kind of semiconductor module
90
with mold resin
5
. Part of lead frame
1
is exposed to the outside from mold resin
5
. This section is used as electrodes to electrically connect to the outside, that is, main circuit terminal and control circuit terminal.
As understood from
FIG. 9A
, left-side lead frame
1
that forms the main circuit and right-side lead frame
1
that forms the control circuit are arranged to be deviated in the vertical direction with respect to the mounted surfaces of power element
2
and control element
3
. The main circuit and lead frame
1
to which the main circuit is arranged are located on the same plane. Similarly, the control circuit and lead frame
1
to which the control circuit is arranged are located on the same plane.
Referring now to
FIG. 9B
, lead frame
1
of conventional semiconductor module
90
can be obtained by processing such as generally pressing a sheet of plate-form metal, and forms circuit wiring necessary for main circuit and control circuit, respectively. Wiring can be practically arranged on the same plane, since, as clear from the figure, all the wiring of lead frame
1
is formed without three-dimensionally intersecting one another,.
Because conventional semiconductor power modules have all the circuits composed with planate lead frames as well as practically and two-dimensionally in each circuit wiring of the main circuit and the control circuit, the physical dimensions must be upsized. This prevents downsizing semiconductor power modules, and consequently, it is unable to downsize the unit itself as well as to achieve large-scale integration.
In addition, since wiring inductance is increased by practically and two-dimensionally arranging circuit wiring, semiconductor module
90
may malfunction. Furthermore, because power element
2
of the main circuit section is allowed to radiate heat via lead frame
1
only, heat interferences occur between adjacent elements due to residual heat capacity of mold resin
5
.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor power module which can be downsized and which is malfunction-resistant.
A semiconductor unit according to the present invention includes the first circuit with the first semiconductor chip carried on the first lead frame and the second circuit with the second semiconductor chip carried on the second lead frame, which are sealed in a resin package. The first lead frame and the second lead frame are arranged to be overlapped. By arranging them overlapped, the physical dimensions of the unit can be reduced.
Another semiconductor unit according to the present invention includes the first circuit with the first three semiconductor chips carried on the first lead frame; the second circuit with the second three semiconductor chips, carried on the second lead frame, for controlling the corresponding first three semiconductor chips; the third circuit with third three semiconductor chips carried on the third lead frame; and the fourth circuit with fourth three semiconductor chips, carried on the fourth lead frame, for controlling the corresponding third three semiconductor chips, which are sealed in resin packages. Each of the first three semiconductor chips and each of the third three semiconductor chips are connected in series, respectively, and form a three-phase inverter as a switching element. The first lead frame and the third lead frame are arranged to be overlapped. Because lead frames of semiconductor chips connected in series which forms the three-phase inverter are arranged to be overlapped, the physical dimensions can be reduced. In addition, wiring inductance can be reduced.
Still another semiconductor unit according to the present invention includes the first circuit carrying first two semiconductor chips on the first lead frame and the second circuit carrying the second semiconductor chip on the second lead frame, which are sealed inside a resin package. The first lead frame is bent inside the resin package to form an overlap and first two semiconductor chips are arranged opposite to each other. Because the lead frame is formed by bending, no wiring to lead frames is required and the number of wire bonding can be reduced, and consequently, reliability related to defective wire bonding can be improved.
REFERENCES:
patent: 5714799 (1998-02-01), Okumura
patent: 6528868 (2003-03-01), Weiblen et al.
patent: 3-272163 (1991-12-01), None
patent: 11-307721 (1999-11-01), None
Kawafuji Hisashi
Yoshida Hiroshi
Mitsubishi Denki & Kabushiki Kaisha
Potter Roy
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