Semiconductor transmission gate with capacitance compensation

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307246, 3073032, 307579, 307585, H03K 1716

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active

049889028

ABSTRACT:
A transmission gate employs a pair of capacitors ahead of and a pair of capacitors behind a transistor. One capacitor of each pair is supplied with a control voltage pulse that leads and the other with a control voltage pulse that lags the complement of a control voltage pulse supplied to the gate of the transistor. The capacitors are typically each a MOS transistor with the gate serving as one terminal and the drain and source shorted together and serving as the other terminal. Moreover, each of the capacitors has a capacitance equal to one half the capacitance of the gate to source and gate to drain capacitance of the transistor. This circuitry makes possible charge compensation to avoid the build up of trapped charge in the transistor. The capacitance of the pair of capacitors ahead of the transistor is approximately equal to the gate-to-drain parasitic of the transistor and the capacitance of the pair of capacitors behind the transistor is equal to the parasitic capacitance of the gate-to-source of the transistor.

REFERENCES:
patent: 4467227 (1984-08-01), Lewyn et al.
patent: 4473761 (1984-09-01), Peterson
patent: 4511814 (1985-04-01), Matsuo et al.
patent: 4551634 (1985-11-01), Takahashi et al.
patent: 4590396 (1986-05-01), Koike
patent: 4599522 (1986-07-01), Matsuo et al.
patent: 4651037 (1987-03-01), Ogasawara et al.

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