Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters
Reexamination Certificate
2003-07-11
2004-12-21
Nguyen, Vincent Q. (Department: 2858)
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
Lumped type parameters
C324S765010
Reexamination Certificate
active
06833715
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor testing apparatus and a semiconductor testing method and, in particular, to a semiconductor testing apparatus and a semiconductor testing method capable of testing precisely the gradation output voltages of a semiconductor integrated circuit having a large number of output terminals each for outputting a multi-level output voltage (gradation output voltage) for driving a liquid crystal display panel or the like.
Description of the Related Art
Driving schemes for liquid crystal display panels (TFT liquid crystal display panels) are classified into two types which are dot inversion scheme and line inversion scheme, depending on the polarity switching scheme of the liquid crystal driving voltage. As for the liquid crystal driving voltage which is outputted from a semiconductor integrated circuit for liquid crystal driving (liquid crystal driving apparatus, hereafter), this voltage is outputted as a DA converted voltage generated by dividing a maximum voltage of 5 V, 13 V, or the like into a predetermined multi-level voltage depending on the display gradation level. For example, in the case of 256-gradation level display, a 512-level driving voltage is outputted in dot inversion scheme, while a 256-level driving voltage is outputted in line inversion scheme.
A liquid crystal driving apparatus according to a prior art is constructed, for example, in the form of a package having 384 pins for driving the three series of R, G, and B each having 128 dots. When a liquid crystal display panel having vertical 1024 dots by horizontal 1280 dots according to SXGA standard is to be driven by any liquid crystal driving apparatus, ten of such liquid crystal driving apparatuses each constructed in the form of a package having 384 pins are to be used. Meanwhile, in the shipment of such liquid crystal driving apparatuses, total inspection is carried out, whereby those not satisfying predetermined specifications are selectively eliminated.
FIG. 17
is a block diagram schematically showing a typical liquid crystal driving apparatus. Gradation display input data RGB (6 bits or more/output in each color) is sampled sequentially, whereby the gradation display input data pieces in the number corresponding to one horizontal period are acquired and latched in a hold memory. After that, each piece of the data is provided through a level shifter to a DA converter (digital-to-analogue converter; abbreviated as a DAC in some cases, hereafter). For each output, the DAC selects a gradation level generated by a reference voltage generation circuit (ladder resistors), and thereby outputs a gradation level (gradation output voltage) through an output operational amplifier provided for each output and through an output terminal.
FIG. 18
is a circuit diagram schematically showing a reference voltage generation circuit. The above-mentioned reference voltage generation circuit generates a desired gradation level as a voltage (V
0
-Vn) outputted from a resistor connection point by means of the resistor-dividing of a DC voltage Vdc using ladder resistors (R
1
-Rn). Depending on the above-mentioned input data (the number of bits), a 6-bit DAC permits 64-gradation level display, while an 8-bit DAC permits 256-gradation level display, and while a 10-bit DAC permits 1024-gradation level display. With an increase in the number of gradation levels in liquid crystal driving apparatuses, precise voltage measurement becomes indispensable in the test of liquid crystal driving apparatuses in order to ensure the quality.
That is, a test is necessary for checking whether the gradation output voltages outputted from DACs have correct voltage values and whether the values of the gradation output voltages are uniform among DACs. Further, when the supply voltage to a device to be tested (DUT: device under test) is the same, and when the performance in the output is improved from 64 gradation levels to 256 gradation levels, the precision of the measurement needs to be improved by a factor of four.
A semiconductor testing apparatus (semiconductor test system), a semiconductor testing method, and the like are described below for the case that a DUT to be tested is a liquid crystal driving apparatus (liquid crystal driving LSI) which comprises n-gradation level DACs each for selecting and outputting one from n voltage levels for driving a liquid crystal display panel and which comprises M output terminals for liquid crystal driving.
FIGS. 19 and 20
are block diagrams each showing schematically a prior art semiconductor test system. Such a prior art is disclosed, for example, in JP-A2001-99899. The prior art semiconductor test system of
FIG. 19
is composed of a semiconductor testing apparatus (semiconductor tester)
182
for testing a DUT
181
. The semiconductor testing apparatus
182
provides a predetermined input signal (not shown) to the DUT
181
, and thereby tests (determines) whether the signals converted in a certain manner by the DACs
183
provided in the DUT
181
and then outputted from the output terminals Y
1
-YM are appropriate or not. In this semiconductor test system, the semiconductor testing apparatus
182
provides predetermined input signals to the DUT (liquid crystal driving apparatus)
181
, and thereby causes the DUT to output sequentially the first gradation level signal through the n-th gradation level signal. This output is switched by a matrix switch
184
(ch
1
-chM) provided in the semiconductor testing apparatus
182
, and then inputted to an analogue voltmeter
185
. The analogue voltmeter
185
measures sequentially the first gradation level output voltage of each output (output terminals Y
1
-YM). In each time of the measurement, the result is stored in a data memory
186
provided in the semiconductor testing apparatus
182
. This operation is repeated until the n-th gradation level, whereby data for all outputs and all gradation levels is eventually stored in the data memory
186
. As a result, data having a size of the number of outputs m (M output terminals)×n (n gradation levels) is stored in the data memory
186
.
The data stored in the data memory
186
is processed by a predetermined operation in an operation apparatus
187
provided in the semiconductor testing apparatus
182
, whereby a test is performed on each gradation level output voltage of each output terminal and on the uniformity of the gradation output voltages among the output terminals. In such a test of the liquid crystal driving apparatus (DUT
181
), with an increase in the number of outputs and in the number of gradation levels of the liquid crystal driving apparatus, a necessity is occurring for measuring the gradation output voltage values with higher precision. This causes an increase in the testing time, and requires an expensive semiconductor testing apparatus (
182
) comprising a high precision analogue voltmeter (
185
).
In the prior art semiconductor test system of
FIG. 20
, difference voltages are measured between an expected voltage (expected gradation voltage) for each gradation level and the output voltages from respective output terminals (Y
1
-YM) of the liquid crystal driving apparatus. Determination is performed on these difference voltages in a parallel manner by a comparing section
196
. Here, the expected gradation voltage (expected voltage, in some cases hereafter) indicates a voltage expected to be generated depending on each gradation level according to the design. The prior art semiconductor test system of
FIG. 20
comprises a DUT
191
, a semiconductor testing apparatus
192
, expected voltage generating means
60
, and a differential amplifier array module
193
. The DUT
191
comprises DACs
194
. The differential amplifier array module
193
comprises differential amplifiers
195
. The semiconductor testing apparatus
192
comprises a comparing section
196
. The operation of the DUT
191
and the semiconductor testing apparatus
192
is the same as that of the DUT
181
and the semiconductor testing apparatus
182
Ehiro Masayuki
Mori Masami
Sakaguchi Hideaki
Nguyen Vincent Q.
Nixon & Vanderhye P.C.
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