Semiconductor test instrument

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C714S744000

Reexamination Certificate

active

10538901

ABSTRACT:
Output data of a device under test (DUT) is obtained at timing of both rising and falling edges of a clock output from the DUT, and output data of a DDR type device is fetched in synchronization with the clock. A semiconductor test apparatus comprises a clock side time interpolator20which obtains clocks input from a DUT1by a plurality of strobes of constant timing intervals and which outputs the clocks as time-sequential level data, a data side time interpolator20which obtains output data input from the DUT1by a plurality of strobes of constant timing intervals and which outputs the output data as time-sequential level data, and an edge selector30which switches the time-sequential level data obtained by the time interpolators20and selectively outputs level data indicating rising and/or falling edges of the level data.

REFERENCES:
patent: 4876655 (1989-10-01), Carlton et al.
patent: 6789224 (2004-09-01), Miura
patent: 6865698 (2005-03-01), Housako
patent: 6892333 (2005-05-01), Ohtaki et al.
patent: 7078889 (2006-07-01), Oshima
patent: 7100099 (2006-08-01), Niijima
patent: 7107166 (2006-09-01), Kantake
patent: 7126366 (2006-10-01), Ohashi et al.
patent: 01-164118 (1989-06-01), None
patent: 2000-314767 (2000-11-01), None
patent: WO 97/04327 (1997-02-01), None

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