Semiconductor test head apparatus using field programmable...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S1540PB

Reexamination Certificate

active

07821284

ABSTRACT:
A semiconductor test head apparatus using a field programmable gate array (FPGA) is disclosed. A semiconductor test head apparatus using a field programmable gate array, includes a pattern generator for generating a predetermined memory test pattern, a driver/comparator unit comprising a first transceiver which performs a driver function capable of recording a memory test pattern generated from the pattern generator in a device under test and a comparator function capable of comparing a level of a signal read by the device under test with a predetermined high-level reference value, and a second transceiver which performs the driver function and a comparator function capable of comparing a level of a signal read by the device under test with a predetermined low-level reference value, and a connection unit for electrically connecting the first transceiver in parallel to the second transceiver, and connecting the first transceiver and the second transceiver to the device under test.

REFERENCES:
patent: 6255843 (2001-07-01), Kurihara
patent: 6631340 (2003-10-01), Sugamori et al.
patent: 7356435 (2008-04-01), Sato et al.

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