Semiconductor test apparatus

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Details

C324S1540PB, C324S363000, C714S744000, C702S072000

Reexamination Certificate

active

07126366

ABSTRACT:
Good device PASS/FAIL determination is realized by measuring timings of both signals, i.e., a cross point of differential clock signals CLK and a data signal DATA output from a DUT, and obtaining a relative phase difference between both signals. A semiconductor test apparatus comprises differential signal timing measurement means for outputting cross point information Tcross obtained by measuring a timing of a cross point of one of differential signals output from the device under test, non-differential signal timing measurement means for outputting data change point information Tdata obtained by measuring a timing of transition of a logic of the other non-differential signal output from the DUT, phase difference calculation means for outputting a phase difference ΔT obtained by calculating a relative phase difference between the cross point information Tcross and the data change point information Tdata obtained by simultaneously measuring both of the output signals, and PASS/FAIL determination means for determining PASS/FAIL of a relative positional relation of the DUT based on a predetermined threshold value for executing PASS/FAIL determination upon reception of the phase difference ΔT.

REFERENCES:
patent: 6016566 (2000-01-01), Yoshida
patent: 6789224 (2004-09-01), Miura
patent: 2002/0003433 (2002-01-01), Housako
patent: 2006/0036411 (2006-02-01), Nagai
patent: 11-038086 (1999-02-01), None
patent: 2001-201532 (2001-07-01), None
patent: 2001-351381 (2001-12-01), None
patent: 2001-356153 (2001-12-01), None
patent: 2002-025294 (2002-01-01), None
patent: WO 01/95075 (2001-12-01), None

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