Semiconductor synchronous memory device responsive to external m

Details Semiconductor synchronous memory device responsive to external m Semiconductor synchronous memory device responsive to external m

1999-04-09

2000-07-04

Nelms, David

Static information storage and retrieval

Addressing

Sync/clocking

36523008, 36518905, 365226, G11C 800

Patent

active

060848227

ABSTRACT:
A synchronous dynamic random access memory device is responsive to external commands so as to write a data bit into and read out the data bit from a memory cell array. When an external power source starts to supply an external power voltage to a power source, an internal power voltage starts to rise toward a constant level, and a masking signal generator produces an internal masking signal in response to an external masking signal so as to force a data port to enter high-impedance state, thereby preventing an external device from receiving an undefined data signal.

REFERENCES:
patent: 4881201 (1989-11-01), Sato et al.
patent: 4980799 (1990-12-01), Tobita
patent: 5600605 (1997-02-01), Schaefer
patent: 5703831 (1997-12-01), Sawada

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