Semiconductor synchronous memory device having input circuit for

Details Semiconductor synchronous memory device having input circuit for Semiconductor synchronous memory device having input circuit for

1994-03-31

1995-08-22

Popek, Joseph A.

Static information storage and retrieval

Addressing

Sync/clocking

365191, 365194, G11C 800

Patent

active

054446678

ABSTRACT:
A synchronous dynamic random access memory device latches external command signals for defining the internal sequence, and an input circuit produces an internal control signal from a system clock signal and a clock enable signal for latching the external command signals, wherein the input circuit maintains the internal control signal in an active level for a predetermined time period regardless of the duty ratio of the external clock signal so that a malfunction hardly takes place.

REFERENCES:
patent: 4970693 (1990-11-01), Nozaki
patent: 5018111 (1991-05-01), Madland
patent: 5311483 (1994-05-01), Takasugi
Patent Abstracts of Japan, vol. 13, No. 361, 11 Aug. 1989.
Electronic Design, vol. 41, No. 4, Feb. 1993, pp. 45-49, Bursky, "Synchronous DRAMS Clock A 100 MHZ".

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