Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2001-07-31
2003-02-25
Tran, Minh Loan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C257S018000, C257S015000, C257S190000, C257S191000, C257S192000
Reexamination Certificate
active
06525338
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to: a semiconductor substrate, which can be used for a high speed MOSFET or the like; a field effect transistor; a method of forming a SiGe layer suitable for the formation of a strained Si layer or the like and a method of forming a strained Si layer using the same; and a method of manufacturing a field effect transistor.
2. Description of Related Art
In recent years, high speed MOSFET, MODFET and HEMT devices have been proposed in which a strained Si layer, which has been grown epitaxially on a Si (silicon) wafer with a SiGe (silicon germanium) layer disposed therebetween, is used for the channel area. In this type of strained Si-FET, a biaxial tensile strain occurs in the Si layer due to the SiGe which has a larger lattice constant than Si, and as a result, the Si band structure alters, the degeneracy is lifted, and the carrier mobility increases. Consequently, using this strained Si layer for a channel area typically enables a 1.5 to 8 fold speed increase. Furthermore in terms of processes, a typical Si substrate produced by CZ methods can be used as the substrate, and a high speed CMOS can be realized using conventional CMOS processes.
However, in order to achieve epitaxial growth of the aforementioned strained Si layer for use as the FET channel area, a good quality SiGe layer must first be grown by epitaxial growth on the Si substrate. Unfortunately, the difference between the lattice constants for Si and SiGe results in crystallinity problems due to dislocation and the like. As a result, the following conventional countermeasures have been proposed.
These countermeasures include a method utilizing a buffer layer in which the Ge composition ratio within the SiGe is altered with a constant gentle gradient, a method utilizing a buffer layer in which the Ge (germanium) composition ratio is altered in a series of steps, a method utilizing a buffer layer in which the Ge composition ratio is altered to a supper lattice state, and a method utilizing a Si off-cut wafer and a buffer layer in which the Ge composition ratio is altered with a constant gentle gradient (U.S. Pat. Nos. 5,442,205, 5,221,413, PCT WO98/00857, and Japanese Unexamined Patent Application, First Publication No. Hei 6-252046).
However, the conventional techniques described above still suffer from the following problem.
Namely, the crystallinity of the SiGe film grown using the above conventional techniques is sufficiently poor that the threading dislocation density does not reach the level required for a device. Furthermore, it is also difficult to achieve a device of low dislocation density which also displays good surface roughness, a factor which can determine whether a device passes or fails when an actual device is manufactured. This surface roughness refers to the effect observed on the surface of irregularities generated by internal dislocation.
For example, in those cases where a buffer layer is used in which the Ge composition ratio varies with a certain gradient, the threading dislocation density can be kept comparatively low, but the surface roughness deteriorates. In contrast, in those cases where a buffer layer is used in which the Ge composition ratio varies across a series of steps, the surface roughness is comparatively low, but the threading dislocation density becomes undesirably large. Furthermore, in the case where an off-cut wafer is used, the dislocation is more likely to exit laterally, and not in the direction of the film growth, although once again a sufficiently low degree of dislocation density is unachievable.
BRIEF SUMMARY OF THE INVENTION
The present invention takes the above problems into consideration, with an object of providing a semiconductor substrate, a field effect transistor, a method of forming a SiGe layer and a method of forming a strained Si layer which utilizes this SiGe layer formation method, and a method of manufacturing a field effect transistor, in which the threading dislocation density is low and the surface roughness is minimal
In order to resolve the problems detailed above, the present invention adopts the configuration described below. Namely, a semiconductor substrate of the present invention comprises a Si substrate on which is formed a SiGe buffer layer constructed of a plurality of laminated layers comprising alternating layers of a SiGe gradient composition layer in which the Ge composition ratio gradually increases from the Ge composition ratio of the base material, and a SiGe constant composition layer which is provided on top of the gradient composition layer and in which the Ge composition ratio is the same as that of the upper surface of the gradient composition layer.
Furthermore, a SiGe layer formation method according to the present invention is a method of forming a SiGe layer on top of a Si substrate, wherein a step for epitaxially growing a SiGe gradient composition layer in which the Ge composition ratio gradually increases from the Ge composition ratio of the base material, and a step for epitaxially growing, on top of the SiGe gradient composition layer, a SiGe constant composition layer in which the Ge composition ratio is the same as that of the final Ge composition ratio of the gradient composition layer, are performed repeatedly to form a plurality of layers on top of the Si substrate, and generate a SiGe layer in which the Ge composition ratio varies with a series of steps inclined relative to the direction of the film growth.
As a result of extensive research on SiGe film formation technology, the inventors discovered that dislocation within the crystal displayed the following tendencies.
Namely, it is thought that during film formation of the SiGe layer, the dislocations generated within the film display a tendency to propagate either at an oblique angle relative to the direction of the film formation, or in a lateral direction (in a direction orthogonal with the direction of the film formation: direction <110>). Furthermore, the dislocations are more likely to propagate in a lateral direction at a layer interface, although at those interfaces where the composition alters suddenly, the dislocations are more likely to propagate in the aforementioned oblique direction and nucleations of dislocation are likely to occur at higher densities.
Consequently, if film formation is carried out using a simple stepped Ge composition ratio, then it is thought that high densities of dislocations will be generated at the interface sections where a sudden variation in composition occurs, and that the dislocations will be likely to propagate at an oblique angle relative to the direction of the film formation, and that there will consequently be considerable danger of threading dislocation occurring. Furthermore, if film formation is carried out using a simple gentle Ge composition ratio gradient, then it is thought that the lack of sections (interfaces and the like) which offer opportunity for the oblique dislocations to exit in a lateral direction means that the dislocations penetrate through to the surface.
In contrast, in a method of forming a SiGe layer according to the present invention, because a step for epitaxially growing a SiGe gradient composition layer in which the Ge composition ratio gradually increases from the Ge composition ratio of the base material (Si in those cases where the base material for the growing process is a Si substrate, or SiGe in those cases where the base material is a constant composition layer), and a step for epitaxially growing a SiGe constant composition layer on top of the gradient composition layer in which the Ge composition ratio is the same as that of the final Ge composition ratio of the gradient composition layer are repeated a plurality of times, and furthermore because a semiconductor substrate of the present invention comprises a SiGe buffer layer constructed of a plurality of laminated layers comprising alternating gradient composition layers and constant composition layers, this buffer layer comprises a plur
Mizushima Kazuki
Shiono Ichiro
Yamaguchi Kenji
Mitsubishi Materials Corporation
Tran Minh Loan
Tran Tan
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