Semiconductor substrate comprising wafer substrate and compound

Details Semiconductor substrate comprising wafer substrate and compound Semiconductor substrate comprising wafer substrate and compound

1989-02-28

1990-05-22

Hearn, Brian E.

Metal treatment

Barrier layer stock material, p-n type

Having at least three contiguous layers of semiconductive...

437110, 437132, 437107, 357 16, 148DIG60, H01L 2120

Patent

active

049274716

ABSTRACT:
A semiconductor substrate including a top epitaxial compound layer comprising: a single-crystalline semiconductor wafer substrate; a strained layer superlattice (SLS) structure layer having a lattice constant varying from that of the wafer substrate to that of the top compound semiconductor layer and formed on the wafer substrate; a semiconductor buffer layer having the same lattice constant as that of the top compound semiconductor layer and formed on the SLS structure layer; another SLS structure layer for filtering dislocations having a fixed lattice constant equal to that of the top semiconductor layer and formed on the buffer layer; and the top semiconductor layer formed on the another SLS structure layer.

REFERENCES:
patent: 4088515 (1978-05-01), Blakeslee
patent: 4769341 (1988-09-01), Luryi
patent: 4771013 (1988-09-01), Curran
patent: 4793872 (1988-12-01), Mennier
patent: 4804639 (1989-02-01), Yablonovitch
N. El-Masry et al., "Defect Reduction in GaAs Epilayers on Si . . . ", Mat. Res. Suc. Symp. Proc., vol. 91, 1897, pp. 99-103.
Two C. Chong and Clifton G. Fonstad, "Low-Threshold Operation of . . . ", Appl. Phys. Lett. 51(4), Jul. 1987, pp. 221-223.
Nakayama, "Effects of . . . ", Appl. Phys. Lett. 48 (4), 1/27/86, pp. 281-283.

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