Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Heterojunction formed between semiconductor materials which...
Reexamination Certificate
2001-07-31
2003-08-12
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Heterojunction formed between semiconductor materials which...
C257S184000, C257S189000
Reexamination Certificate
active
06605832
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The invention is directed to group III-V nitride semiconductor devices.
2. Description of Related Art
III-V semiconductors are compound semiconductors containing a group III element and a group V element. Gallium nitride (GaN) is one such semiconductor, with gallium from group III and nitrogen from group V. GaN is useful in laser diodes, and is especially useful in emitting light in the blue or UV region of the electromagnetic spectrum. GaN is able to emit in this region due to its large band gap. The large band gap of GaN allows emission of light with a large energy and short wavelength, which are characteristics of the blue or UV part of the electromagnetic spectrum.
Nevertheless, the large band gap present in many nitride-based group III-V semiconductors creates a large p-type contact resistance between the semiconductor structures and the metal contacts used in such group III-V semiconductor devices. This large contact resistance arises because of the difference between the energy level of the valence band in the group III-V material and the Fermi level of the metal used to form the metal contacts. The large contact resistance contributes to the large voltage required to drive these group III-V semiconductor devices, which leads to greater power use, can cause device heating and operational difficulties, and can cause device degradation and limited device life.
As a possible solution, high p-doping of GaN may allow carriers to tunnel through the barrier between the metal contacts and the semiconductor structures. However, obtaining such high p-dopant levels may itself be difficult for other reasons.
SUMMARY OF THE INVENTION
Forming high quality ohmic contacts to group III-V semiconductor materials, such as, for example, p-type gallium nitride, is an outstanding problem in nitride device design. The lineup between the gallium nitride valence band and the Fermi level of most metals is such that a large offset exists. That is, a large p-type Schottky barrier height, &phgr;
p
, occurs. This large Schottky barrier height &phgr;
p
makes it difficult to inject holes into the gallium nitride valence band. Even metals with large values for the work function, such as gold, nickel, palladium and platinum, having work function values of 5.1 to 5.5 eV, 5.1 to 5.4 eV, 5.1 to 5.6 eV, and 5.7 eV, respectively, fail to produce a Schottky barrier height &phgr;
p
that is sufficiently small to facilitate hole injection, because of the low energetic position of the gallium nitride valence band.
This invention provides methods for forming group III-V semiconductor devices having contact interlayers between the metal contact layer and the active group III-V semiconductor structure.
This invention separately provides a semiconductor device having a variable group III-V contact interlayer between a first group III-V material and a metal contact layer.
This invention further provides a variable group III-V contact interlayer that has a plurality of homogenous sublayers, each homogeneous sublayer having a different composition.
This invention alternatively further provides a variable group III-V contact interlayer that has at least one heterogeneous layer, each heterogeneous layer having a varying composition.
In various exemplary embodiments of a semiconductor device according to this invention, a gallium phosphide or gallium nitride phosphide interlayer is used to achieve contact formation on p-type gallium nitride. In the various exemplary embodiments, gallium phosphide is used because the energetic position of its valence band is about 1.3 eV above the valence band of the gallium nitride. This higher valence band position makes it much easier to form a p-type ohmic contact between gallium phosphide and the metal contact layers. An interlayer of gallium phosphide or of gallium nitride phosphide between the metal contact layer and the p-doped gallium nitride semiconductor structure therefore facilitates hole injection into the p-doped gallium nitride.
In various exemplary embodiments, a gallium phosphide interlayer or a gallium nitride phosphide interlayer can be used to divide the large energy difference between the metal contact layer and the gallium nitride semiconductor structure. In various other exemplary embodiments, multiple layers with varying concentrations of phosphide or nitride phosphide may also be used to divide the large energy difference between the metal contact layer and the gallium nitride semiconductor structure. In still other various exemplary embodiments, grading the composition of a GaN
1−x
P
x
interlayer from pure gallium nitride towards an increasingly higher proportion of phosphide can be used to divide the large energy difference between the metal contact layer and the gallium nitride semiconductor structure. It should also be appreciated that two or more such heterogeneous composition interlayers would also be used.
The structure of this invention is not limited to forming an ohmic contact to gallium nitride, but also applies to contacts to other nitrides, InN, AlN or nitride alloys (InGaN, AlGaN, AlInN).
These and other features and advantages of this invention are described in, or are apparent from, the following detailed description of various exemplary embodiments of the systems and methods according to this invention.
REFERENCES:
patent: 6100586 (2000-08-01), Chen et al.
patent: 2002/0000563 (2002-01-01), Udagawa
Oliff & Berridge PLC.
Pham Long
Xerox Corporation
LandOfFree
Semiconductor structures having reduced contact resistance does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor structures having reduced contact resistance, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor structures having reduced contact resistance will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3127950