Semiconductor structure with improved isolation between two laye

Details Semiconductor structure with improved isolation between two laye Semiconductor structure with improved isolation between two laye

1980-10-14

1985-02-05

James, Andrew J.

357 54, 357 59, 357 79, H01L 2978

Patent

active

044980957

ABSTRACT:
In a field effect device such as a charge coupled device or field effect transistor in which at least two levels of polycrystalline silicon conductors are used; these two levels of polycrystalline silicon are isolated from one another with a dielectric layer. Disclosed is a composite dielectric layer formed either by in situ oxidation of the first polycrystalline silicon layer plus chemical vapor deposited silicon dioxide or, in the alternative, the composite dielectric layer is formed by a phosphosilicate glass layer with thermal reoxidation of the first polycrystalline silicon layer.

REFERENCES:
patent: 3560810 (1971-02-01), Balk et al.
patent: 4099196 (1978-07-01), Simko
patent: 4278989 (1981-07-01), Baba et al.
patent: 4331968 (1982-05-01), Gosney, Jr. et al.
patent: 4348746 (1982-09-01), Okabayashi et al.
patent: 4376983 (1983-03-01), Tsaur et al.
patent: 4377818 (1983-03-01), Kuo et al.

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