Semiconductor structure with a dielectric layer and its...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having air-gap dielectric

Reexamination Certificate

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C438S411000, C438S619000

Reexamination Certificate

active

06284621

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method for forming a dielectric layer and a semiconductor structure with a dielectric layer.
BACKGROUND OF THE INVENTION
In order to save more data in a limited space of the integrated circuit, the line width is getting smaller and smaller. Currently, the minimum line width is 0.35 &mgr;m or 0.25 &mgr;m. In the future, the line width may be minimized to 0.18 &mgr;m. The smaller the line width, the smaller the space between the metal lines becomes. However, the capacitance between the metals lines will be increased if the space is getting smaller. The large capacitance will decrease the working speed and working efficiency.
The solution of this problem is to develop a new material with a very low dielectric constant. The dielectric material generally used in the case of fabricating the line width of 0.35 &mgr;m is SiO
2
and SiOF and the dielectic constant of them is in the range of 3~3.7. The polymer/aerogels/air material with a dielectric constant ranged from 1 to 2 is a new dielectric material used in the case of fabricating the line width of 0.25 &mgr;m. However, the best dielectric material is air. The dielectric constant of air is almost equal to 1, the minimum dielectric constant. If air is used as the dielectric material, the capacitance between the metal lines can be seriously decreased.
The conventional process for producing a dielectric layer is a spinning spread method as shown in FIG.
1
. The present invention provides a method of using air as the inter-metal-dielectric (IMD) material and the semiconductor structure with a dielectric layer can be achieved by this method.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method for forming a dielectric layer. The method includes the steps of (a) providing a semiconductor substrate having thereon a plurality of metal lines forming therebetween a plurality of concave regions, and (b) forming the dielectric layer on the metal lines while preventing the dielectric layer from being formed inside the concave regions. The dielectric layer is an inter-metal-dielectric (IMD) layer and preferably the dielectric material is air. The concave regions are formed by the spaces between the metal lines, and each of the concave regions sometimes further includes a plurality of smaller concave regions between the metal lines.
The step (b) of the present invention further includes four steps of the viscosity-adjusting method, the tilt-flowing method, the mold-forming method, and the mold-flowing method.
The viscosity-adjusting method of the step (b) includes the steps of (b1) dropping a liquid dielectric material on the semiconductor substrate to form the dielectric layer. The surface tension of the liquid dielectric material is controlled by adding therein an adjusting agent for preventing the liquid dielectric material from flowing into the concave regions. The liquid dielectric material is preferably hydrogen silsesquioxane (HSQ). After the step (b), the method further includes a step of (c1) drying the dielectric layer.
The tilt-flowing method of the step (b) includes the steps of (b2) tilting the semiconductor substrate with a particular angle, and (b3) dropping a liquid dielectric material on the semiconductor substrate to form the dielectric layer. The surface tension of the liquid dielectric material is also controlled by adding therein an adjusting agent and the liquid dielectric material is HSQ. The particular angle is preferably 90 degrees. After the step (b), the tilt-flowing method further includes a step of (c2) drying the dielectric layer.
The mold-forming method of the step (b) includes the steps of (b4) covering the top of a molding board with a liquid dielectric material, and (b5) putting the molding board upside-down on the semiconductor substrate to form the dielectric layer on the metal lines. After the step (b4), the method further includes the steps of (c3) drying the dielectric layer, and (c4) removing the molding board. In order to facilitate the step (c4), the molding board has thereon a polymer film, and preferably the polymer material is polyimide.
The mold-flowing method of the step (b) further includes the steps of (b6) tilting the semiconductor substrate with a particular angle, (b7) tilting a molding board with the particular angle, wherein the metal lines substrate and the molding board have a gap therebetween, and (b8) dropping a liquid dielectric material in the gap to form the dielectric layer. After the step (b), the mold-forming method further includes the steps of (c5) drying the dielectric layer, and (c6) removing the molding board. In order to facilitate the step (c6), the molding board has thereon a polymer film, and preferably the polymer material is polyimide. The particular angle of the mold-forming method is ranged from 0 to 180 degrees.
Another object of the present invention is to provide a semiconductor structure including a semiconductor substrate having thereon a plurality of metal lines forming therebetween a plurality of concave regions, and a dielectric layer formed on the metal lines excepting the concave regions.
The present invention may best be understood through the following description with reference to the accompanying drawings, in which:


REFERENCES:
patent: 5814888 (1998-09-01), Nishioka et al.
patent: 5863832 (1999-01-01), Doyle et al.
patent: 5880018 (1999-03-01), Boeck et al.
patent: 5949143 (1999-09-01), Bang
patent: 5989983 (1999-11-01), Goo et al.
patent: 6071805 (2000-06-01), Liu
patent: 6130151 (2000-10-01), Lin et al.

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