Semiconductor structure having metallization inlaid in insulatin

Details Semiconductor structure having metallization inlaid in insulatin Semiconductor structure having metallization inlaid in insulatin

1974-05-06

1976-06-08

Tupman, W.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 29580, 29591, 29628, B01J 1700

Patent

active

039614140

ABSTRACT:
In a semiconductor structure with multiple levels of metallization on the surface, each metallization pattern is inlaid in trenches formed in an insulating layer. The surface of the metallization is flush with or somewhat lower than the surface of its associated insulating layer. In a preferred embodiment, the different etching characteristics of glass and silicon nitride are utilized to form the trenches in the glass layer. The glass comprises the insulating layer and the nitride forms the bottom of the trench.

REFERENCES:
patent: 3160534 (1964-12-01), Oroshnik
patent: 3264402 (1966-08-01), Shaheen
patent: 3479237 (1969-11-01), Bergh
patent: 3481777 (1969-12-01), Spannhake
patent: 3498833 (1970-03-01), Lehrer
patent: 3508325 (1970-04-01), Perry
patent: 3597834 (1971-08-01), Lathrop
patent: 3633269 (1972-01-01), Bachmeier
patent: 3726002 (1973-04-01), Greenstein

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