Semiconductor structure for isolating integrated circuits of...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including high voltage or high power devices isolated from...

Reexamination Certificate

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C257S504000, C257S544000, C257S409000, C257SE27013

Reexamination Certificate

active

11136810

ABSTRACT:
A semiconductor structure includes an isolation ring disposed on a semiconductor substrate, surrounding first and second circuit areas. A buried isolation layer is continuously extended through the first circuit area and the second circuit area, in the semiconductor substrate. The buried isolation layer interfaces with the isolation ring, thereby isolating the first and second circuit areas from a backside bias of the semiconductor substrate. An ion enhanced isolation layer separates the first well in the first circuit area and the second well in the second circuit areas from the isolation ring and the buried isolation layer, thereby preventing punch-through between the wells of the circuit areas and the buried isolation layer.

REFERENCES:
patent: 2005/0042815 (2005-02-01), Williams et al.

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