Patent
1989-08-18
1991-12-03
Hille, Rolf
357 43, 357 90, H01L 2702, H01L 2704
Patent
active
050703820
ABSTRACT:
A semiconductor structure for high power integrated circuits is fabricated having a substrate, a first and second epitaxial layer, each having a patterned buried layer, and a third epitaxial layer in which power, logic and analogic devices are formed. The power device is formed in an isolated region of the third epitaxial layer over the buried layers, which provide for good electrical contact to the back of the substrate. The analogic and logic devices are formed in the third epitaxial layer outside the isolated region of the power device. The thickness of the first and second epitaxial layers reduces the NPN parasitic transistor effect. The first epitaxial layer may be fabricated with a lower resistivity to further reduce the parasitic NPN transistor effect. The second epitaxial layer can be of a higher resistivity in order to reduce autodoping of the third epitaxial layer.
REFERENCES:
patent: 4831430 (1989-06-01), Umeji
Barbee Joe E.
Fahmy Wael
Hille Rolf
Jackson Miriam
Motorola Inc.
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