Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Reexamination Certificate
2007-05-22
2007-05-22
Jackson, Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
C257S509000, C257S506000, C257SE21545, C438S298000
Reexamination Certificate
active
10967131
ABSTRACT:
The present invention discloses a semiconductor structure avoiding the poly stringer formation in semiconductor processing. A semiconductor device is divided into a memory cell area and a peripheral portion. A plurality of parallel first isolation devices are positioned in the semiconductor substrate in the memory cell area. A second isolation device is positioned in the semiconductor substrate in the peripheral portion, and parallel with the first isolation device. A dummy buried doping region is positioned in the semiconductor substrate, and is positioned between the memory cell device and the peripheral portion and parallel with the second isolation device. An oxide area is formed on the dummy buried doping region. The dummy buried doping region and the oxide region can prevent poly string formation during subsequent processing.
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patent: 5045489 (1991-09-01), Gill et al.
patent: 5173436 (1992-12-01), Gill et al.
patent: 5844270 (1998-12-01), Kim et al.
Chang Julian
Zheng Yuan-Wei
Budd Paul
Grace Semiconductor Manufacturing Corporation
Jackson Jerome
Rosenberg , Klein & Lee
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