Semiconductor structure and semiconductor manufacturing method

Active solid-state devices (e.g. – transistors – solid-state diode – Transmission line lead

Reexamination Certificate

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C257S698000, C257S700000, C438S622000

Reexamination Certificate

active

07851895

ABSTRACT:
A semiconductor structure comprising a first signal layer, a second signal layer, a wiring layer and at least one via is provided. The wiring layer is formed between the first signal layer and the second signal layer. A conducting wire is disposed between a first terminal and a second terminal on the wiring layer. At least one via is used to conduct the first signal layer and the second signal layer. The at least one via is disposed adjacent to the first terminal and the second terminal.

REFERENCES:
patent: 6441471 (2002-08-01), Maetani
patent: 6611419 (2003-08-01), Chakravorty
patent: 6713853 (2004-03-01), Fazelpour et al.
patent: 7030480 (2006-04-01), Kimura et al.

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