Semiconductor structure and method of manufacture

Details Semiconductor structure and method of manufacture Semiconductor structure and method of manufacture

1986-02-25

1987-08-18

James, Andrew J.

357 47, 357 61, H01L 2980, H01L 2702, H01L 2912, H01L 2936

Patent

active

046880623

ABSTRACT:
A field effect transistor includes a semi-insulating substrate having a doped compensated buffer layer. Such compensated buffer layer is doped with a species which provides deep level acceptors to compensate for background donor doping of the buffer layer and to thus provide the semi-insulating buffer layer. The compensated buffer layer is used to isolate subsequent layers from crystal defects in the substrate. A thin shielding layer having a dopant concentration of 10.sup.14 -3.times.10.sup.15 atoms/cm.sup.3 and a dopant conductivity opposite to that of the dopant used to compensate the buffer layer is disposed over the buffer layer. An active layer is then disposed over the shielding layer and areas in the active layer are provided for source, drain, and gate electrodes. By providing the doped shielding layer, a small amount of conduction is provided in the shielding layer which prevents the build-up of charge in the buffer layer caused by ionization of the deep-level acceptor. The shielding layer also prevents the out-diffusion of the dopant species of the buffer layer into the active layer of the device.

REFERENCES:
patent: 3657615 (1972-04-01), Driver
patent: 3942186 (1976-03-01), McAvoy et al.
patent: 4196439 (1980-04-01), Niehaus et al.
Webster's New World Dictionary, Second College Edition, Copyright 1978, p. 1102.

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