Semiconductor structure and fabrication therefor

Details Semiconductor structure and fabrication therefor Semiconductor structure and fabrication therefor

2007-09-25

2007-09-25

Pert, Evan (Department: 2826)

Semiconductor device manufacturing: process

Forming tapered edges on substrate or adjacent layers

C438S928000, C438S963000, C257SE21214, C257SE21237

Reexamination Certificate

active

10710405

ABSTRACT:
A semiconductor structure and a method of fabrication there-for are provided. The semiconductor structure comprises a substrate, a dielectric layer disposed over the substrate, a hydrophilic material layer disposed over the dielectric layer, and a hardmask layer disposed over the hydrophilic material layer. It is noted that, the edge of the semiconductor structure may be polished after the hydrophilic material layer is formed over the dielectric layer and before the hardmask layer is formed over the hydrophilic material layer.

REFERENCES:
patent: 6734096 (2004-05-01), Dalton et al.
patent: 6737747 (2004-05-01), Barth et al.
patent: 6933234 (2005-08-01), Nakamura et al.
patent: 2005/0194619 (2005-09-01), Edelstein et al.
patent: 2005/0221606 (2005-10-01), Lee et al.
patent: 2005/0250423 (2005-11-01), Nakamura et al.

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