Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
1998-12-03
2002-03-19
Lee, Eddie (Department: 2815)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S289000, C438S282000, C438S291000, C438S427000, C438S589000
Reexamination Certificate
active
06358817
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor storage unit and a method of manufacturing the same.
BACKGROUND OF THE INVENTION
Recently, a semiconductor storage unit has been highly integrated and each element included in the semiconductor storage unit has a minute size. Consequently, the elements are arranged quite closely. For instance, in manufacturing processes for DRAM having a general stack-type memory cell structure, an active region, an element- isolation region, a word line (a gate electrode), a bit line, and a memory cell capacitor are formed on a semiconductor substrate sequentially. A method of manufacturing a conventional semiconductor storage unit will be explained with reference to
FIGS. 20-23
as an example of a manufacturing process for DRAM having a stack-type memory cell structure as follows.
First, in processes shown in FIGS.
20
(
a
) and (
b
), a laminated film
302
of a silicon nitride film and a silicon oxide film is formed on a semiconductor substrate
301
, and using a photoresist
303
a part of the laminated film
304
and a part of the semiconductor substrate
305
are removed by photoetching, thus forming grooves
306
.
As next steps, in processes shown in FIGS.
20
(
c
), (
d
), and (
e
), after depositing a CVD silicon oxide film
307
, a part of the laminated film
304
and a part of the silicon oxide film
307
are removed by polishing to flatten the whole surface and to leave a filled-in film
310
within the grooves
309
. Then, the whole laminated film
308
and a part of the filled-in film
310
are removed by wet etching to leave the filled-in film
311
and to expose a surface
312
of the semiconductor substrate.
In processes shown in FIGS.
21
(
a
) and (
b
), a gate oxide film
313
and a polysilicon film
314
containing impurities are formed sequentially, and then a gate electrode (a word line)
316
is formed by photoetching using a photoresist
315
. As a next step, in a process shown in FIG.
21
(
c
), an impurity-diffusion layer
318
is formed by ion implantation
317
.
In processes shown in FIG.
21
(
d
) and FIG.
22
(
a
), a CVD silicon oxide film
319
is deposited and flattened, and then a contact hole
321
is formed by photoetching using a photoresist
320
. As a next step, in a process shown in FIG.
22
(
b
), after depositing a laminated film
322
of a tungsten silicide film and a polysilicon film containing impurities, a bit line
322
is formed by photoetching.
In processes shown in FIGS.
22
(
c
) and (
d
), a CVD silicon oxide film
323
is deposited and flattened, and then a contact hole
325
is formed by photoetching using a photoresist
324
. As next steps, in processes shown in FIGS.
23
(
a
) and (
b
), a polysilicon film
326
containing impurities is deposited and a charge-storage electrode
328
is formed by photoetching using a photoresist
327
.
Then, in a process shown in FIG.
23
(
c
), a capacity insulating film
329
formed of a laminated film of a silicon oxide film and a silicon nitride film and a polysilicon film
330
containing impurities are formed sequentially, and a plate electrode
330
is then formed by photoetching.
However, in the conventional semiconductor storage unit described above, all the conductive layers of the gate electrode
316
, the bit line
322
, the charge-storage electrode
328
, and the plate electrode
330
are provided on the semiconductor substrate. Therefore, there has been a possibility that a short-circuit occurs easily between the conductive layers when the width of an isolation region between elements and the thickness of an insulating film are decreased according to the higher integration.
Further, in order to secure the insulation between upper and lower conductive layers, it is necessary to increase the thickness of an insulating film between the upper and lower conductive layers. Consequently, the depth of a connection hole for connecting a conductive layer of an upper layer and the semiconductor substrate is increased and therefore the aspect ratio increases, thus deteriorating the covering condition inside the connection hole in the conductive layers. As a result, there has been a problem that poor electric connection occurs inside the connection hole.
SUMMARY OF THE INVENTION
The present invention aims to solve the problems described above. It is an object of the present invention to provide a semiconductor storage unit at a low manufacturing cost by reducing the number of manufacturing processes, in which the formation of a gate electrode within a semiconductor substrate reduces the occurrence of a short circuit between conductive layers and therefore provides an excellent electric connection in a connection hole between the semiconductor substrate and conductive layers, and a method of manufacturing the same.
In order to attain the object described above, a semiconductor storage unit of the present invention comprises a semiconductor substrate, an impurity-diffusion layer, an insulating film, a bit line of a conductive film, a charge-storage electrode of a conductive film, and a gate electrode of a conductive film, which are formed on the semiconductor substrate. The impurity-diffusion layer has a reverse conductive type as compared to that of the semiconductor substrate and is formed on the semiconductor substrate. In the semiconductor storage unit, the bit line and the charge-storage electrode are connected to the surface of the semiconductor substrate. A plurality of openings are formed in the semiconductor substrate. A filled-in layer of an insulating film is formed within the openings and the gate electrode is formed within the filled-in layer.
According to the semiconductor storage unit described above, the gate electrode is provided within the semiconductor substrate. Therefore, the short-circuit between the gate electrode and the other conductive layers does not occur easily, thus improving the reliability of the semiconductor storage unit. Since the depth of a connection hole for connecting the semiconductor substrate and the conductive layers located above the gate electrode can be made shallow, an excellent covering condition inside the connection hole can be obtained in the conductive layers. Consequently, poor electric connection of the conductive layers can be prevented in the connection hole, thus improving the reliability of the semiconductor storage unit.
In the semiconductor storage unit described above, it is preferable that the bit line and the surface of the semiconductor substrate are connected through a connection hole that is formed by making an opening in the insulating film and that opens between the bit line and the surface of the semiconductor substrate, and the charge-storage electrode and the surface of the semiconductor substrate are connected through a connection hole that is formed by making an opening in the insulating film and that opens between the charge-storage electrode and the surface of the semiconductor substrate.
It is preferable that an insulating film is formed between a bottom face of the opening and the gate electrode.
Further, it is preferable that a plate electrode of a conductive film is formed on the charge-storage electrode and the insulating film via a capacity insulating film.
It is also preferable that the bit line is formed between the semiconductor substrate and the plate electrode.
It is preferable that the bit line is formed on the plate electrode via an insulating film.
It is further preferable that the connection hole for connecting the bit line and the semiconductor substrate passes through between the adjacent plate electrodes. According to the semiconductor storage unit described above, the connection hole is secured within a pattern of the plate electrode, thus enabling the semiconductor storage unit to be highly integrated.
It is preferable that the depth of the opening is deeper than that of the impurity-diffusion layer. According to the semiconductor storage unit described above, reliable insulation can be obtained between memory cells having a switching tran
Lee Eddie
Merchant & Gould P,C,
Richards N. Drew
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