Static information storage and retrieval – Interconnection arrangements
Patent
1998-11-23
2000-08-15
Nelms, David
Static information storage and retrieval
Interconnection arrangements
365200, 36523003, 36523006, G11C 506
Patent
active
061046302
ABSTRACT:
A memory cell array includes a plurality of memory cells that are arranged in the row and column directions. Power supply lines and grounding lines are arranged on the memory cell array so as to extend in the column direction. The grounding lines are so arrayed that a plurality of power supply lines are interposed therebetween or, conversely, the power supply lines are so arranged that a plurality of grounding lines are interposed therebetween. By connecting together adjacent power supply lines (or grounding lines) of the same potential on a column decoder to form a single power line, the number of power supply lines extending in the column direction on the column decoder can be reduced, whereby an effective element forming region of the column decoder can be expanded.
REFERENCES:
patent: Re32993 (1989-07-01), Anami et al.
patent: Re33280 (1990-07-01), Yoshimoto et al.
patent: 5231607 (1993-07-01), Yoshida et al.
patent: 5293559 (1994-03-01), Kim et al.
patent: 5321646 (1994-06-01), Tomishima et al.
patent: 5325336 (1994-06-01), Tomishima et al.
patent: 5416748 (1995-05-01), Fujita
patent: 5581508 (1996-12-01), Sasaki et al.
patent: 5708620 (1998-01-01), Jeong
Ho Hoai V.
Mitsubishi Denki & Kabushiki Kaisha
Nelms David
LandOfFree
Semiconductor storage device having spare and dummy word lines does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor storage device having spare and dummy word lines, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor storage device having spare and dummy word lines will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2014347