Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2011-04-12
2011-04-12
Ho, Hoai V (Department: 2827)
Static information storage and retrieval
Addressing
Sync/clocking
C365S233160, C365S233170
Reexamination Certificate
active
07924651
ABSTRACT:
An exemplary aspect of an embodiment of the present invention is a semiconductor storage device including a power-on reset generator that outputs a first reset signal in accordance with a level of a power supply voltage, a command decoder that moves to a mode set state in accordance with input of an external control pin and outputs mode set information in accordance with a command input from an address pin, an MRS controller that outputs a mode reset signal (MRSPON signal) in accordance with the mode set information, and a reset circuit that outputs a second reset signal initializing each circuit of an operation control section in accordance with the mode reset signal and the first reset signal.
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patent: 2006/0203576 (2006-09-01), Nishimura et al.
patent: 01-137494 (1989-05-01), None
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Foley & Lardner LLP
Ho Hoai V
Lappas Jason
Renesas Electronics Corporation
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