Semiconductor storage device

Static information storage and retrieval – Format or disposition of elements

Reexamination Certificate

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Reexamination Certificate

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08040709

ABSTRACT:
A semiconductor storage device includes: a memory cell array having memory cells positioned at respective intersections between a plurality of first wirings and a plurality of second wirings, each of the memory cells having a rectifier element and a variable resistance element connected in series; and a control circuit selectively driving the first and second wirings. The plurality of first wirings that are specified and selectively driven at the same time by one of a plurality of address signals are separately arranged with other first wirings interposed therebetween within the memory cell array when a certain potential difference is applied to a selected memory cell positioned at an intersection between the first and second wirings by the control circuit.

REFERENCES:
patent: 5517450 (1996-05-01), Ohsawa
patent: 7345916 (2008-03-01), Yang et al.
patent: 7561464 (2009-07-01), Toda
patent: 2009/0122598 (2009-05-01), Toda et al.
patent: 2009/0196116 (2009-08-01), Oh
patent: 2009/0207647 (2009-08-01), Maejima et al.
patent: 2010/0067279 (2010-03-01), Choi
U.S. Appl. No. 12/849,407, filed Aug. 3, 2010, Maejima et al.

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