Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2008-11-18
2010-11-30
Ho, Hoai V (Department: 2827)
Static information storage and retrieval
Interconnection arrangements
C365S189150, C365S189160, C365S205000, C365S230030
Reexamination Certificate
active
07843717
ABSTRACT:
A semiconductor storage device includes a memory array compartmentalized into first and second regions alternately arranged. The second regions are formed by odd and even columns alternately arranged. The semiconductor storage device includes: a memory mat array arranged in each first region; a sense amp array arranged in each second region; local IO lines arranged in each second region and connected to the sense amp array; main IO lines crossing the first and second regions; and a read/write amplifier arranged in each second region and at an intersection region where the local IO lines cross the main IO lines. The read/write amplifier in an odd column is connected to a local IO line therein and to a local IO line in the next odd column. The read/write amplifier in an even column is connected to a local IO line therein and to a local IO line in the next even column.
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Ichikawa Hiroshi
Ishikawa Toru
Kamino Tomoyuki
Elpida Memory Inc.
Foley & Lardner LLP
Ho Hoai V
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