Semiconductor static ram including load resistors formed on diff

Static information storage and retrieval – Format or disposition of elements

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365 63, 365154, 357 51, 357 71, G11C 502, G11C 506

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active

050124439

ABSTRACT:
A static random access memory device including resistance loaded flip-flop circuits has adjacent memory cells arranged to form memory cell pairs. Each memory cell pair has a first unit cell and a second unit cell. Load resistors for the first unit cells and load resistors for the second unit cells are formed on different insulation layers and are stacked on each other on the substrate. A structural pattern of the load resistors is extended over adjacent memory cells in order for the length and resistance of the resistors to be increased. The length of the load resistors can be cut down for compensating for the increase in the resistance enabling the reduction in size of other devices, and enabling the packing density of the device to be increased.

REFERENCES:
patent: 4322824 (1982-03-01), Allan
patent: 4326213 (1982-04-01), Shirai et al.
patent: 4481524 (1984-11-01), Tsujide
patent: 4774203 (1988-09-01), Ikeda et al.
patent: 4853894 (1989-08-01), Yamanaka et al.

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