Semiconductor stacked device

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

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Details

437208, 361393, 361396, 361412, 257685, 257723, H01L 2316

Patent

active

051988887

ABSTRACT:
There is a trend to increase that area of a device requiring a memory of large capacity, which is occupied by a semiconductor memory. This trend obstructs reduction of the size of the device. The present invention contemplates to provide a memory which can have a high integration, a high density and a large capacity while minimizing the mounting area. In order to achieve this memory, the TAB (Tape Automated Bonding) of the prior art is mounted on an electrically conductive connector, and a plurality of structures composed of the TAB and the connector are stacked. Moreover, the connector mounting the TAB thereon is constructed such that the independent terminals of the stacked TABs may not be shorted.

REFERENCES:
patent: 4300153 (1981-11-01), Hayakawa et al.
patent: 4949158 (1990-08-01), Ueda
patent: 4982265 (1991-01-01), Watanabe et al.
patent: 4996583 (1991-02-01), Hatada
patent: 5028986 (1991-07-01), Sugano et al.

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