Semiconductor simulator tool for experimental N-channel transist

Details Semiconductor simulator tool for experimental N-channel transist Semiconductor simulator tool for experimental N-channel transist

1995-05-04

1998-06-02

Chin, Gary

Boots, shoes, and leggings

3642212, 3642323, 3642756, 364DIG1, G06F 9455, G06F 1750

Patent

active

057614814

ABSTRACT:
A simulator tool for efficiently modeling a semiconductor transistor structure of varying channel lengths. Process simulation of a transistor structure is performed for a half NMOS transistor structure only, followed by separate computations to expand the half-structure to a full structure of varying channel lengths. Standard device simulations are then performed on the full structures to simulate electrical properties of interest, such as threshold voltage (V.sub.T) and saturation drive current (I.sub.DSAT) The tool thereby constructs a virtual model of transistor structure fabrications that can be graphically displayed to correlate process parameters with the electrical properties for use in predicting results in actual manufacturing.

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patent: 5481475 (1996-01-01), Young
patent: 5502643 (1996-03-01), Fujinaga
Silvaco Product List. Simulation Standard--Announcing: The Virtual Wafer Fab, vol. 3, No. 6, Nov./Dec. 1992, pp. 1-20.
Silvaco Product Literature, Simulation Standard--Announcing: The Virtual Wafer Fab, vol. 3, No. 6, Nov. Dec. 1992, pp. 1-20.
Silvaco Product Literature, Atlas II Device Simulation Framework, undated, 2 pages
Silvaco Product Literature, SSUPREM4 2-D Process Simulator, undated, 4 pages.
Silvaco Product :Literature, S-PISCES 2-D Silicon Device Simulation, undated, 4 pages.

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