Semiconductor production device ceramic plate

Details Semiconductor production device ceramic plate Semiconductor production device ceramic plate

2001-06-25

2004-04-06

Paik, Sang (Department: 3742)

Electric heating

Heating devices

Combined with container, enclosure, or support for material...

Reexamination Certificate

active

06717116

ABSTRACT:

TECHNICAL FIELD
The present invention relates essentially to a ceramic board for the electrostatic chuck, wafer prover and other implements to be used in the manufacture of semiconductor apparatuses and more particularly to a ceramic board for semiconductor manufacture apparatuses which is capable of supporting large-sized semiconductor wafers and dose not adversely affect silicon wafers.
Background Art
Semiconductors are extremely important articles of commerce required in various industries, and typically semiconductor chips are manufactured by the technology which comprises slicing a silicon single crystal to prepare a silicon wafer having a predetermined thickness and constructing various circuits and other components on said wafer.
In the above process for manufacturing a semiconductor chip, various semiconductor production implements each based on a ceramic board, such as the electrostatic chuck, hot plate, wafer prover and susceptor, are used on many occasions.
Regarding such implements for semiconductor manufacture apparatuses, the ceramic boards for use in these applications are described in JP Kokoku 2587289 and Japanese Kokai Publication Hei-10-72260, for instance.
The ceramic boards disclosed in the above patent literature and other publications are invariably available only within the size range of not over about 6 inches (150 mm) in diameter and not less than 8 mm in thickness.
However, the recent trend toward increase in the size of a silicon wafer has led to a demand for ceramic boards as large as 8 inches or more in diameter.
Meanwhile, in the process for manufacturing silicon wafers, heating procedures require the use of a heater having a heating element embedded in a ceramic substrate and for achieving an improved temperature response or follow-up efficiency through a reduction in heat capacity, the thickness of the ceramic board must be reduced to less than 8 mm.
On the other hand, there has been disclosed a ceramic board having a wafer-mounting surface controlled to a roughness value of not more than Rmax=2 &mgr;m (Japanese Kokai Publication Hei-7-280462).
However, the manufacture of a hot plate, an electrostatic chuck or the like using such a large and thin ceramic board was found to involve various problems, for example the creation of a temperature gradient in the silicon wafer placed thereon and consequent destruction of the wafer by thermal shock or the failure to generate a sufficient chucking force despite the reduced surface roughness and the consequent non-uniformity of wafer temperature.
SUMMARY OF THE INVENTION
The inventors of the present invention did much research in the above state of the art and found that troubles such as destruction of the silicon wafer, non-uniformity of wafer temperature due to an insufficient chucking force, and the unevenness of silicon wafer temperature which occurs in a heating mode where the wafer is heated in suspension at a certain distance from the surface of the ceramic board are all caused by the presence of an undulation in the surface of the ceramic substrate. Further investigations revealed that the above troubles can be overcome by reducing the surface undulation of a ceramic substrate so that the surface will fall within a certain range of flatness. The present invention has been developed on the basis of the above finding.
The ceramic board for semiconductor manufacture apparatuses according to a first aspect of the present invention, therefore, comprises a ceramic substrate and semiconductor wafer directly mounted or indirectly supported at a fixed distance from its surface,
wherein the surface of a ceramic substrate, where said semiconductor wafer is to be mounted or supported, is controlled to a flatness of 1 &mgr;m to 50 &mgr;m over a measurement range of [(the diametric end-to-end length of the substrate)−10 mm].
The ceramic board for semiconductor manufacture apparatuses according to a second aspect of the present invention comprises a ceramic substrate and a conductor layer disposed internally or on a surface thereof,
wherein said surface is controlled to a flatness of 1 to 50 &mgr;m over a measurement range of [(said diametric end-to-end length)−10 mm].
In the ceramic boards for semiconductor manufacture apparatuses according to said first and second aspects of the present invention, said flatness is preferably 1 to 20 &mgr;m.
Flatness is a concept quite different from roughness. Thus, whereas flatness is pertinent to the macroscopic undulation of a surface, roughness is a marker of microscopic irregularities of a surface.
Therefore, if the roughness of a surface is Rmax=20 &mgr;m, it is not necessarily true that the flatness of the surface is 20 &mgr;m. Flatness as so referred to in this specification is defined as the head between the highest point and the lowest point within a measurement range (FIG.
4
and FIG.
5
).
Diametric end-to-end length as so referred to in this specification means the length of any imaginary straight line passing through the center of a ceramic substrate from one end to the diametrically opposite end on its periphery. Thus, when the ceramic substrate is circular or disk-shaped, the diametric end-to-end length is the diameter of the disk, and when the ceramic substrate is elliptic in plan view, the diametric end-to-end length means both the dimension of the major axis and that of the minor axis. In the present invention, the measurement range of [(diametric end-to-end length)−10 mm] is established in two directions, i.e. along X- and Y-axes, and whichever larger of the two measured values is taken as the flatness of the ceramic board.
In the present invention, the flatness is measured over the surface area exclusive of the area to be occupied by a silicon wafer, i.e. the marginal area within 5 mm from the periphery of the ceramic substrate. Thus, the [(diametric end-to-end length)−10 mm] is the measurement area.
In the ceramic board for semiconductor manufacture apparatuses, said ceramic substrate is in the form of a disk with a diameter in excess of 150 mm.
The reason is as follows. When the diameter of the disk is not more than 150 mm, the ceramic board and the wafer to be mounted thereon are intrinsically small enough to insure a comparatively uniform temperature distribution. Therefore, the problems to be solved by the invention, namely the risks for breakage of the silicon wafer and non-uniformity of the wafer temperature, do not exist from the beginning.
The ceramic substrate in the present invention is preferably not less than 200 mm in diameter and most preferably not less than 300 mm in diameter, for said risks for breakage of silicon wafers and non-uniformity of the wafer temperature are high when the ceramic substrate is more than 200 mm in diameter.
The ceramic substrate mentioned above preferably comprises nitride ceramics and more preferably comprises aluminum nitride, silicon nitride and/or boron nitride.
Preferably, said ceramic substrate contains more than 50 weight % of aluminum nitride.
The conductor layer disposed internally of the ceramic substrate is preferably formed as at least one layer in the center in thickness direction thereof or in an offset position displaced from said center toward the surface thereof,
said surface being opposite to the surface where a semiconductor wafer is to be mounted or supported.
In addition, the conductor layer is preferably formed on the surface of the ceramic substrate,
said surface being opposite to the surface where a semiconductor wafer is to be mounted or supported.
The ceramic boards for semiconductor manufacture apparatuses according to the first and second aspects of the present invention preferably comprises
a conductor layer formed on the surface of said ceramic substrate and
a semiconductor wafer mounted on said conductor layer,
said ceramic board functioning as a wafer prover.
Furthermore, the conductor layer disposed internally of said ceramic substrate preferably comprises at least one layer formed in an offset position

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