Semiconductor processing with silicon cap over Si.sub.1-x Ge.sub

Details Semiconductor processing with silicon cap over Si.sub.1-x Ge.sub Semiconductor processing with silicon cap over Si.sub.1-x Ge.sub

1988-11-29

1992-01-28

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437126, 148DIG15, H01L 2120

Patent

active

050844113

ABSTRACT:
Improved devices with silicon to SiGe alloy heterojunctions are provided for in accordance with the following discoveries. X-ray topography and transmission electron microscopy were used to quantify misfit-dislocation spacings in as-grown Si.sub.1-x Ge.sub.x films formed by Limited Reaction Processing (LRP), which is a chemical vapor deposition technique. These analysis techniques were also used to study dislocation formation during annealing of material grown by both LRP and by molecular beam epitaxy (MBE). The thickness at which misfit dislocations first appear in as-grown material was similar for both growth techniques. The thermal stability of capped and uncapped films was also investigated after rapid thermal annealing in the range of 625.degree. to 1000.degree. C. Significantly fewer misfit dislocations were observed in samples containing an epitaxial silicon cap. Some differences in the number of misfit dislocations generated in CVD and MBE films were observed after annealing uncapped layers at temperatures between 625.degree. and 825.degree. C.

REFERENCES:
patent: 4392297 (1983-07-01), Little
patent: 4529455 (1985-07-01), Bean et al.
patent: 4771013 (1988-09-01), Curran
patent: 4843028 (1989-06-01), Herzog et al.
patent: 4859626 (1989-08-01), Wise
patent: 4861393 (1989-08-01), Bean et al.
patent: 4879256 (1989-11-01), Bean et al.

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