Fishing – trapping – and vermin destroying
Patent
1996-01-18
1997-11-25
Tsai, Jey
Fishing, trapping, and vermin destroying
437919, 437193, 437247, 437 52, H01L 2170, H01L 2700
Patent
active
056912285
ABSTRACT:
A semiconductor processing method of providing a hemispherical grain polysilicon layer atop a substrate includes, a) providing a substantially amorphous layer of silicon over a substrate at a selected temperature; b) raising the temperature of the substantially amorphous silicon layer to a higher dielectric layer deposition temperature, the temperature raising being effective to transform the amorphous silicon layer into hemispherical grain polysilicon; and c) depositing a dielectric layer over the silicon layer at the higher dielectric deposition temperature. Transformation to hemispherical grain might occur during the temperature rise to the higher dielectric layer deposition temperature, after the higher dielectric layer deposition temperature has been achieved but before dielectric layer deposition, or after the higher dielectric layer deposition temperature has been achieved and during dielectric layer deposition. The temperature raising step can include initially raising the silicon layer temperature to an annealing temperature below the higher dielectric layer deposition temperature, and maintaining the silicon layer at the annealing temperature for a time period effective to increase its degree of surface roughness. Subsequently the silicon layer temperature is raised to the higher dielectric layer deposition temperature, with such further increasing the degree of surface roughness of the resultant silicon layer.
REFERENCES:
patent: 5227322 (1993-07-01), Ko et al.
patent: 5256587 (1993-10-01), Jun et al.
patent: 5407534 (1995-04-01), Thakur
Ping Er-Xang
Thakur Randhir P. S.
Micro)n Technology, Inc.
Tsai Jey
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